參數(shù)資料
型號: UPD45128163-A75L
廠商: Elpida Memory, Inc.
英文描述: 128M-bit Synchronous DRAM 4-bank, LVTTL
中文描述: 128兆位同步DRAM 4銀行,LVTTL
文件頁數(shù): 34/86頁
文件大?。?/td> 821K
代理商: UPD45128163-A75L
Data Sheet E0344N10 (Ver. 1.0)
34
μ
PD45128163
DC Characteristics 2 (Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Test condition
MIN.
TYP.
MAX.
Unit
Note
Input leakage current
I
I (L)
0
V
I
V
CC
Q, V
CC
Q = V
CC
All other pins not under test = 0 V
1.0
+1.0
μ
A
Output leakage current
I
O (L)
0
V
O
V
CC
Q, D
OUT
is disabled
1.5
+1.5
μ
A
High level output voltage
V
OH
I
O
=
4 mA
2.4
V
Low level output voltage
V
OL
I
O
= +4 mA
0.4
V
AC Characteristics (Recommended Operating Conditions unless otherwise noted)
Test Conditions
Parameter
Value
Unit
AC high level input voltage / low level input voltage
2.4 / 0.4
V
Input timing measurement reference level
1.4
V
Transition time (Input rise and fall time)
1
ns
Output timing measurement reference level
1.4
V
t
CK
t
CH
t
CL
2.4 V
1.4 V
0.4 V
CLK
2.4 V
1.4 V
0.4 V
Input
t
SETUP
t
HOLD
Output
t
AC
t
OH
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