
2003 Sep 03
38
Philips Semiconductors
Product specication
High speed advanced analog DVD signal
processor and laser supply
TZA1038HW
11 APPLICATION INFORMATION
11.1
Signal relationships
Simplified relationships between signals are described in
this section. In the simplification, all built-in options for
DVD-ROM are omitted. The variables A1 to A3, ALFC and
ALFR, are the linear equivalents of bits G1 to G3,GLFC and
GLFR.
11.1.1
DATA PATH
Pins RFP and RFN carry the RF data signals in opposite
phases with respect to each other. This allows an ADC
with a balanced or differential input to be used in the
decoder. Depending on the DC input ranges of the ADC,
in many cases the connection between TZA1038HW and
the decoder can be a DC pin to pin connection. The
common mode DC level of pins RFP and RFN can be
chosen independently by means of input pin RFREF.
If bit RFSUM = 0
 VRFP =VRFREF + 0.5 × A3 × A2 × A1 × (VI  VRFOFFS)
 VRFN =VRFREF  0.5 × A3 × A2 × A1 × (VI  VRFOFFS)
 VRFDIF =A3 × A2 × A1 × (VI  VRFOFFS).
If bit RFSUM = 1
 VRFP =VRFREF +0.5 × ARFSUM × A3 × (VRFSUMP  VRFSU
MN  VRFOFFSS)
 VRFN =VRFREF  0.5 × ARFSUM × A3 × (VRFSUMP  VRFSU
MN  VRFOFFSS)
 VRFDIF =ARFSUM × A3 (VRFSUMP  VRFSUMN  VRFOFFSS).
Where:
 A1,A2,A3 and ARFSUM are programmed gain values
 VI = average input voltage at pins A to D, with respect to
the voltage at pin OPUREF
 VRFOFFS is the programmed RFOFFS DAC voltage
(register 4 and register 5)
 VRFREF is the input voltage at pin RFREF.
Correct settings for VRFREF and VRFOFFS are required to
keep both VRFP and VRFN at the DC voltage levels
specified for the TZA1038HW and the decoder.
11.1.2
SERVO PATH
The current through output pins OA to OD represents the
low-pass filtered input voltage of each individual pick-up
segment. The gain from input to output can be
programmed to adapt to different disc types or pick-ups
(offset cancellation is omitted for simplicity):
(in DVD push-pull mode)
or:
(in CD three-beam push-pull mode)
or:
(in DPD mode)
Where:
 A
LFC and ALFR are the programmable gains in central
and radial paths
 Gain should be programmed such that maximum signal
levels fit into the range of the servo processor ADC
 VI(A); VI(B); VI(C) and VI(D) are defined as input voltages
at pins A to D with respect to pin OPUREF
 IDC is a DC current that keeps IS1 and IS2 unipolar
 IFS is the sensitivity to relative phase difference.
Phase difference =
;
180° < φ < + 180°.
I
Ox
V
Ix
A
LFC
×
14 k
---------------------------
=
I
S1
V
I(A)
V
I(B)
+
() A
LFR
×
30 k
-----------------------------------------------------
=
I
S2
V
I(C)
V
I(D)
+
() A
LFR
×
30 k
-----------------------------------------------------
=
I
S1
V
I(E)
A
LFR
×
15 k
------------------------------
=
I
S2
V
I(F)
A
LFR
×
15 k
------------------------------
=
I
S1
I
DC
I
FS
phase difference
×
+
=
I
S2
I
DC
I
FS
–
phase difference
×
=
t
T
p
------
φ degrees
[]
360
----------------------------------
=