參數(shù)資料
型號(hào): TVP5154PNPG4
廠商: Texas Instruments, Inc.
英文描述: 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK
中文描述: 4通道低功耗PAL / NTSC制式/ SECAM制式,帶有獨(dú)立的定標(biāo)器和視頻解碼器快速鎖定
文件頁數(shù): 37/78頁
文件大小: 824K
代理商: TVP5154PNPG4
www.ti.com
9.2.24
Address
Default
Vertical Blanking Start Register
18h
00h
9.2.25
Address
Default
Vertical Blanking Stop Register
19h
00h
9.2.26
Address
Default
Chrominance Control #1 Register
1Ah
0Ch
TVP5154
4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER
WITH INDEPENDENT SCALERS AND FAST LOCK
SLES163A–MARCH 2006–REVISED JULY 2006
7
6
5
4
3
2
1
0
Vertical blanking start
Vertical blanking (VBLK) start:
0111 1111 = 127 lines after start of vertical blanking interval
0000 0001 = 1 line after start of vertical blanking interval
0000 0000 = Same time as start of vertical blanking interval (default) (see
Figure 4-1
,
Figure 4-2
, and
Figure 4-3
)
1111 1111 = 1 line before start of vertical blanking interval
1000 0000 = 128 lines before start of vertical blanking interval
Vertical blanking is adjustable with respect to the standard vertical blanking intervals. The setting in this
register determines the timing of the GPCL/VBLK signal when it is configured to output vertical blank (see
register 03h). The setting in this register also determines the duration of the luma bypass function (see
register 07h).
7
6
5
4
3
2
1
0
Vertical blanking stop
Vertical blanking (VBLK) stop:
0111 1111 = 127 lines after stop of vertical blanking interval
0000 0001 = 1 line after stop of vertical blanking interval
0000 0000 = Same time as stop of vertical blanking interval (default) (see
Figure 4-1
,
Figure 4-2
, and
Figure 4-3
)
1111 1111 = 1 line before stop of vertical blanking interval
1000 0000 = 128 lines before stop of vertical blanking interval
Vertical blanking is adjustable with respect to the standard vertical blanking intervals. The setting in this
register determines the timing of the GPCL/VBLK signal when it is configured to output vertical blank (see
register 03h). The setting in this register also determines the duration of the luma bypass function (see
register 07h).
7
6
5
4
3
2
1
0
Reserved color
PLL reset
Chrominance adaptive comb filter
enable (ACE)
Chrominance comb filter enable
(CE)
Automatic color gain control
Color PLL reset:
0 = Color PLL not reset (default)
1 = Color PLL reset
Writing a 1 to this bit resets the color PLL and transmits a 1 in the reset bit of the GLCO output stream.
Chrominance adaptive comb filter enable (ACE):
0 = Disable
1 = Enable (default)
Chrominance comb filter enable (CE):
0 = Disable
1 = Enable (default)
Automatic color gain control (ACGC):
00 = ACGC enabled (default)
01 = Reserved
10 = ACGC disabled
11 = ACGC frozen to the previously set value
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Internal Control Registers
37
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