參數資料
型號: TPS65020RHA
廠商: Texas Instruments, Inc.
英文描述: POWER MANAGEMENT IC FOR LI-ION POWERED SYSTEMS
中文描述: 電源管理IC鋰離子供電系統(tǒng)
文件頁數: 36/44頁
文件大?。?/td> 3085K
代理商: TPS65020RHA
www.ti.com
Output Capacitor Selection
IRMSCout
1
Vout
Vin
L
1
2
3
(6)
IRMSCout
1
Vout
Vin
L
1
8
Cout
ESR
(7)
Input Capacitor Selection
TPS65020
SLVS607–SEPTEMBER 2005
See
Table 3
and the typical applications for possible inductors.
Table 3. Tested Inductors
DEVICE
INDUCTOR
VALUE
3.3
μ
H
3.3
μ
H
3.3
μ
H
2.2
μ
H
2.2
μ
H
3.3
μ
H
3.3
μ
H
2.2
μ
H
3.3
μ
H
3.3
μ
H
3.3
μ
H
2.2
μ
H
TYPE
COMPONENT SUPPLIER
CDRH2D14NP-3R3
LPS3010-332
VLF4012AT-3R3M1R3
VLF4012AT-2R2M1R5
NR3015T2R2
CDRH2D18/HPNP-3R3
VLF4012AT-3R3M1R3
VLCF4020-2R2
CDRH3D14/HPNP-3R2
CDRH4D28C-3R2
MSS5131-332
VLCF4020-2R2
Sumida
Coilcraft
TDK
TDK
Taiyo-Yuden
Sumida
TDK
TDK
Sumida
Sumida
Coilcraft
TDK
DCDC3 converter
DCDC2 converter
DCDC1 converter
The advanced Fast Response voltage mode control scheme of the inductive converters implemented in the
TPS65020 allow the use of small ceramic capacitors with a typical value of 10
μ
F for a 3.3-
μ
H inductor for each
converter without having large output voltage under and overshoots during heavy load transients.
For a fast transient response a 22-
μ
F capacitor with a 2.2-
μ
H inductor should be used on each converter.
Ceramic capacitors having low ESR values have the lowest output voltage ripple and are recommended. See
Table 4
for recommended components.
If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the application
requirements. Just for completeness, the RMS ripple current is calculated as:
At nominal load current, the inductive converters operate in PWM mode. The overall output voltage ripple is the
sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and
discharging the output capacitor:
Where the highest output voltage ripple occurs at the highest input voltage Vin.
At light load currents, the converters operate in PSM and the output voltage ripple is dependent on the output
capacitor value. The output voltage ripple is set by the internal comparator delay and the external capacitor. The
typical output voltage ripple is less than 1% of the nominal output voltage.
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing the interference with other circuits caused by high input
voltage spikes. Each dc-dc converter requires a 10-
μ
F ceramic input capacitor on its input pin VINDCDCx. The
input capacitor is increased without any limit for better input voltage filtering. The VCC pin is separated from the
input for the dc-dc converters. A filter resistor of up to 10R and a 1-
μ
F capacitor is used for decoupling the VCC
pin from switching noise. Note that the filter resistor may affect the UVLO threshold since up to 3 mA can flow via
this resistor into the VCC pin when all converters are running in PWM mode.
36
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