參數(shù)資料
型號: TOOLSTICK300DC
廠商: Silicon Laboratories Inc
文件頁數(shù): 19/178頁
文件大小: 0K
描述: TOOLSTICK DAUGHTER CARD
標準包裝: 1
系列: ToolStick
類型: MCU
適用于相關產(chǎn)品: C8051F300
所含物品: 子卡
Rev. 2.9
115
C8051F300/1/2/3/4/5
13.4. Using the SMBus
The SMBus can operate in both Master and Slave modes. The interface provides timing and shifting con-
trol for serial transfers; higher level protocol is determined by user software. The SMBus interface provides
the following application-independent features:
Byte-wise serial data transfers
Clock signal generation on SCL (Master Mode only) and SDA data synchronization
Timeout/bus error recognition, as defined by the SMB0CF configuration register
START/STOP timing, detection, and generation
Bus arbitration
Interrupt generation
Status information
SMBus interrupts are generated for each data byte or slave address that is transferred. When transmitting,
this interrupt is generated after the ACK cycle so that software may read the received ACK value; when
receiving data, this interrupt is generated before the ACK cycle so that software may define the outgoing
ACK value. See Section “13.5. SMBus Transfer Modes” on page 123 for more details on transmission
sequences.
Interrupts are also generated to indicate the beginning of a transfer when a master (START generated), or
the end of a transfer when a slave (STOP detected). Software should read the SMB0CN (SMBus Control
register) to find the cause of the SMBus interrupt. The SMB0CN register is described in Section
ence.
SMBus configuration options include:
Timeout detection (SCL Low Timeout and/or Bus Free Timeout)
SDA setup and hold time extensions
Slave event enable/disable
Clock source selection
These options are selected in the SMB0CF register, as described in Section “13.4.1. SMBus Configura-
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