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參數(shù)資料
| 型號： | TMX320C6415TGLZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 54/140頁 |
| 文件大?。?/td> | 2033K |
| 代理商： | TMX320C6415TGLZ |
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SPRS226H NOVEMBER 2003 REVISED AUGUST 2005
54
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
IPU
DESCRIPTION
NAME
NO.
UTOPIA SLAVE (ATM CONTROLLER) TRANSMIT INTERFACE (CONTINUED)
UXDATA7
AD10
UXDATA6
AD9
UXDATA5
AD8
8-bit Transmit Data Bus
Using the Transmit Data Bus, the UTOPIA Slave (on the rising edge of the UXCLK) transmits
the 8-bit ATM cells to the Master ATM Controller.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), these pins are tied-
off.
UXDATA4
AE8
O/Z
UXDATA3
AF9
UXDATA2
AF7
UXDATA1
AE7
UXDATA0
AD7
UTOPIA SLAVE (ATM CONTROLLER) RECEIVE INTERFACE
URCLK
AD12
I
Source clock for UTOPIA receive driven by Master ATM Controller.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URCLAV
AF14
O/Z
Receive cell available status output signal from UTOPIA Slave.
0
indicates NO space is available to receive a cell from Master ATM Controller
1
indicates space is available to receive a cell from Master ATM Controller
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URENB
AD15
I
UTOPIA receive interface enable input signal. Asserted by the Master ATM Controller to indi-
cate to the UTOPIA Slave to sample the Receive Data Bus (URDATA[7:0]) and URSOC signal
in the next clock cycle or thereafter.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URSOC
AB14
I
Receive Start-of-Cell signal. This signal is output by the Master ATM Controller to indicate to
the UTOPIA Slave that the first valid byte of the cell is available to sample on the 8-bit Receive
Data Bus (URDATA[7:0]).
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
CLKX1/
URADDR4§
AB12
I/O/Z
McBSP1 [default] or UTOPIA receive address pins
As UTOPIA receive address pins URADDR[4:0] (
I
), UTOPIA_EN (BEA11 pin) = 1:
5-bit Slave receive address input pins driven by the Master ATM Controller to identify and
select one of the Slave devices (up to 31 possible) in the ATM System.
CLKS1/
URADDR3§
AC8
I
CLKR1/
URADDR2§
AC10
I/O/Z
URADDR1 and URADDR0 pins are tied off when the UTOPIA peripheral is disabled
[UTOPIA_EN (BEA11 pin) = 0]
URADDR1
AF10
I
For the McBSP1 pin functions (UTOPIA_EN (BEA11 pin) = 0 [default]), see the
MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1) section of this table.
URADDR0
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k
IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
§These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.
External pulldowns required:
If
UTOPIA is selected (BEA11 = 1)
and
these pins are connected to other devices, then a 10-k
resistor must be
used to
externally
pull down each of these pins. If these pins are “no connects”, then only UXCLK and URCLK need to be pulled down and other
pulldowns are not necessary.
External pullups required:
If
UTOPIA is selected (BEA11 = 1)
and
these pins are connected to other devices, then a 10-k
resistor must be used
to
externally
pull up each of these pins. If these pins are “no connects”, then the pullups are not necessary.
Ψ
The C6414T device does not support the UTOPIA peripheral; therefore, these standalone UTOPIA pins are
Reserved
(leave unconnected,
do
not
connect to power or ground) with the exception of UXCLK and URCLK which should be connected to a 10-k
pulldown resistor (see the
square [ ] footnote).
AE10
I
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