參數(shù)資料
型號： TMX320C6415TGLZ
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 定點數(shù)字信號處理器
文件頁數(shù)： 41/140頁
文件大?。?/td> 2033K
代理商： TMX320C6415TGLZ
SPRS226H NOVEMBER 2003 REVISED AUGUST 2005
41
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
DEVICE CONFIGURATIONS (CONTINUED)
Table 29. C6414T, C6415T, and C6416T Device Multiplexed Pins
MULTIPLEXED PINS
NAME
DEFAULT FUNCTION
DEFAULT SETTING
DESCRIPTION
NO.
CLKOUT4/GP1
AE6
CLKOUT4
GP1EN = 0 (disabled)
These pins are software-configurable.
To use these pins as GPIO pins, the
GPxEN bits in the GPIO Enable
Register and the GPxDIR bits in the
GPIO Direction Register must be
properly configured.
GPxEN = 1: GPx pin enabled
GPxDIR = 0: GPx pin is an input
GPxDIR = 1: GPx pin is an output
CLKOUT6/GP2
AD6
CLKOUT6
GP2EN = 0 (disabled)
CLKS2/GP8
AE4
CLKS2
GP8EN = 0 (disabled)
GP9/PIDSEL
M3
needs to be disabled (PCI_EN = 0), the
GPxEN bits in the GPIO Enable
Register and the GPxDIR bits in the
GPIO Direction Register must be
properly configured.
GPxEN = 1: GPx pin enabled
GPxDIR = 0: GPx pin is an input
GPxDIR = 1: GPx pin is an output
GP10/PCBE3
L2
To use GP[15:9] as GPIO pins, the PCI
GP11/PREQ
F1
GPxEN = 0 (disabled)
PCI_EN = 0 (disabled)
GP12/PGNT
J3
None
GP13/PINTA
G4
GP14/PCLK
F2
GP15/PRST
G3
DX1/UXADDR4
AB11
DX1
FSX1/UXADDR3
AB13
FSX1
By default, McBSP1 is enabled upon
To enable the UTOPIA peripheral, an
external pullup resistor (1 k
) must be
provided on the BEA11 pin (setting
UTOPIA_EN = 1 at reset).
FSR1/UXADDR2
AC9
FSR1
UTOPIA_EN (BEA11) = 0
(disabled)
DR1/UXADDR1
AF11
DR1
reset (UTOPIA is disabled).
CLKX1/URADDR4
AB12
CLKX1
CLKS1/URADDR3
AC8
CLKS1
CLKR1/URADDR2
AC10
CLKR1
CLKX2/XSP_CLK
AC2
CLKX2
DR2/XSP_DI
AB3
DR2
DX2/XSP_DO
AA2
DX2
HD[31:0]/AD[31:0]
HD[31:0]
HAS/PPAR
T3
HAS
By default, HPI is enabled upon reset
(PCI is disabled).
To enable the PCI peripheral an external
on the PCI_EN pin (setting PCI_EN = 1
at reset).
HCNTL1/PDEVSEL
R1
HCNTL1
HCNTL0/PSTOP
T4
HCNTL0
PCI_EN = 0 (disabled)
HDS1/PSERR
T1
HDS1
HDS2/PCBE1
T2
HDS2
pullup resistor (1 k ) must be provided
HR/W/PCBE2
P1
HR/W
HHWIL/PTRDY
R3
HHWIL (HPI16 only)
HINT/PFRAME
R4
HINT
HCS/PPERR
HRDY/PIRDY
For the C6415T and C6416T devices, all other standalone UTOPIA and PCI pins are tied-off internally (pins in Hi-Z) when the peripheral is
disabled [UTOPIA_EN (BEA11) = 0 or PCI_EN = 0].
The C6414T device does not support the PCI and UTOPIA peripherals. These are the
only
multiplexed pins on the C6414T device, all other
pins are standalone peripheral functions and are not muxed.
§For the HD[31:0]/AD[31:0] multiplexed pins pin numbers, see the
Terminal Functions
table.
R2
P4
HCS
HRDY
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