參數(shù)資料
型號(hào): TMS470R1A256PZ
廠商: Texas Instruments, Inc.
英文描述: 16/32-Bit RISC Flash Microcontroller
中文描述: 16/32位RISC閃存微控制器
文件頁(yè)數(shù): 5/46頁(yè)
文件大?。?/td> 392K
代理商: TMS470R1A256PZ
www.ti.com
device characteristics
The TMS470R1A256 device is a derivative of the F05 system emulation device SE470R1VB8AD. Table 1
identifies all the characteristics of the TMS470R1A256 device except the SYSTEM and CPU, which are generic.
TMS470R1A256
16/32-Bit RISC Flash Microcontroller
SPNS100–NOVEMBER 2004
Table 1. Device Characteristics
DEVICE DESCRIP-
TION
CHARACTERISTICS
COMMENTS
MEMORY
For the number of memory selects on this device, see the "Memory Selection Assignment" table (Table 2).
Flash is pipeline-capable.
256K-Byte Flash
12K-Byte SRAM
INTERNAL MEMORY
The A256 RAM is implemented in one 12K array selected by two memory-select
signals (see the "Memory Selection Assignment" table, Table 2).
PERIPHERALS
For the device-specific interrupt priority configurations, see the "Interrupt Priority" table (Table 4). For the 1K peripheral address ranges and
their peripheral selects, see the "A256 Peripherals, System Module, and Flash Base Addresses" table (Table 3).
CLOCK
ZPLL
Zero-pin PLL has no external loop filter pins.
GENERAL-PURPOSE I/Os
11 I/O 1 Input only
Port A has 8 external pins and Port B has 4 external pins.
ECP
YES
C2SIb
1
SCI
1 (3-pin) 1 (2-pin)
SCI2 has no external clock pin, only transmit/receive pins (SCI2TX and SCI2RX)
CAN
1 SCC
Standard CAN controller
(HECC and/or SCC)
SPI (5-pin, 4-pin or 3-pin)
2 (5-pin)
The A256 devices have both the logic and registers for a full 32-I/O HET
implemented, even though not all 32 pins are available externally.
The high-resolution (HR) SHARE feature allows even HR pins to share the next
higher odd HR pin structures. This HR sharing is independent of whether or not the
odd pin is available externally. If an odd pin is available externally and shared, then
the odd pin can only be used as a general-purpose I/O.
HET with XOR Share
16 I/O
For more information on HR SHARE, see the
TMS470R1x High-End Timer (HET)
Reference Guide
(literature number SPNU199).
HET RAM
64-Instruction Capacity
10-bit, 16-channel
64-word FIFO
1.81–2.05 V
3.0–3.6 V
100
PZ
Both the logic and registers for a full 16-channel MibADC are present. The
MibADC is capable of being event-triggered from a user-selectable event source.
MibADC
CORE VOLTAGE
I/O VOLTAGE
PINS
PACKAGE
5
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TMS470R1A288 制造商:TI 制造商全稱:Texas Instruments 功能描述:16/32-Bit RISC Flash Microcontroller
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