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| 型號： | TMS417409ADJ-60 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 4194304 BY 4-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES |
| 中文描述： | 4194304 4位擴展數(shù)據(jù)輸出動態(tài)隨機存取存儲器 |
| 文件頁數(shù)： | 10/37頁 |
| 文件大?。?/td> | 515K |
| 代理商： | TMS417409ADJ-60 |
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TMS416409A, TMS417409A, TMS426409A, TMS427409A
4194304 BY 4-BIT EXTENDED DATA OUT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS893B – AUGUST 1996 – REVISED APRIL 1997
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
TMS417409A
PARAMETER
TEST CONDITIONS
’417409A-50
MIN
’417409A-60
MIN
’417409A-70
MIN
UNIT
MAX
MAX
MAX
VOH
High-level output
voltage
IOH = – 5 mA
2.4
2.4
2.4
V
VOL
Low-level output voltage
IOL = 4.2 mA
VCC = 5.5 V,
All others = 0 V to VCC
VCC = 5.5 V,
CAS high
0.4
0.4
0.4
V
II
Input current (leakage)
VI = 0 V to 6.5 V,
±
10
±
10
±
10
μ
A
IO
Output current
(leakage)
VO = 0 V to VCC,
±
10
±
10
±
10
μ
A
ICC1§
Average read- or
write-cycle current
VCC = 5.5 V,
Minimum cycle
130
110
100
mA
ICC2
Average standby
current
VIH = 2.4 V (TTL),
After one memory cycle,
RAS and CAS high
2
2
2
mA
VIH = VCC – 0.2 V (CMOS),
After one memory cycle,
RAS and CAS high
1
1
1
mA
ICC3§
Average refresh current
(RAS-only refresh or
CBR)
VCC = 5.5 V,
RAS cycling,
RAS low after CAS low (CBR)
Minimum cycle,
CAS high (RAS only),
130
110
100
mA
ICC4
Average EDO current
VCC = 5.5 V,
RAS low,
tHPC = MIN,
CAS cycling
110
90
80
mA
For conditions shown as MIN/MAX, use the appropriate value specified in the timing requirements.
Measured with outputs open
§Measured with a maximum of one address change while RAS = VIL
Measured with a maximum of one address change during each EDO cycle, tHPC
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