參數(shù)資料
型號: TLV320DAC3101IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: DAC WITH PROGRAMMABLE PLL, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù): 18/100頁
文件大?。?/td> 1281K
代理商: TLV320DAC3101IRHBR
SLAS666 – JANUARY 2010
www.ti.com
5.5.1
DAC
The TLV320DAC3101 stereo audio DAC supports data rates from 8 kHz to 192 kHz. Each channel of the
stereo audio DAC consists of a signal-processing engine with fixed processing blocks, a digital
interpolation filter, multibit digital delta-sigma modulator, and an analog reconstruction filter. The DAC is
designed to provide enhanced performance at low sampling rates through increased oversampling and
image filtering, thereby keeping quantization noise generated within the delta-sigma modulator and signal
images strongly suppressed within the audio band to beyond 20 kHz. To handle multiple input rates and
optimize power dissipation and performance, the TLV320DAC3101 allows the system designer to program
the oversampling rates over a wide range from 1 to 1024 by configuring page 0 / register 13 and page 0 /
register 14. The system designer can choose higher oversampling ratios for lower input data rates and
lower oversampling ratios for higher input data rates.
The TLV320DAC3101 DAC channel includes a built-in digital interpolation filter to generate oversampled
data for the delta-sigma modulator. The interpolation filter can be chosen from three different types,
depending on required frequency response, group delay, and sampling rate.
DAC power up is controlled by writing to page 0 / register 63, bit D7 for the left channel and bit D6 for the
right channel. The left-channel DAC clipping flag is provided as a read-only bit on page 0 / register 39,
bit D7. The right-channel DAC clipping flag is provided as a read-only bit on page 0 / register 39, bit D6.
5.5.1.1
DAC Processing Blocks
The TLV320DAC3101 implements signal-processing capabilities and interpolation filtering via processing
blocks. These fixed processing blocks give users the choice of how much and what type of signal
processing they use and which interpolation filter is applied.
The choices among these processing blocks allow the system designer to balance power conservation
and signal-processing flexibility. Table 5-11 gives an overview of all available processing blocks of the
DAC channel and their properties. The resource-class column gives an approximate indication of power
consumption for the digital (DVDD) supply; however, based on the out-of-band noise spectrum, the analog
power consumption of the drivers (HPVDD) may differ.
The signal processing blocks available are:
First-order IIR
Scalable number of biquad filters
3D effect
Digital sine-wave (beep) generator
The processing blocks are tuned for common cases and can achieve high image rejection or low group
delay in combination with various signal-processing effects such as audio effects and frequency shaping.
The available first-order IIR and biquad filters have fully user-programmable coefficients.
24
APPLICATION INFORMATION
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3101
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