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參數(shù)資料
| 型號(hào)： | TLC320AD81CDBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO38 |
| 封裝： | PLASTIC, TSSOP-38 |
| 文件頁(yè)數(shù)： | 32/47頁(yè) |
| 文件大?。?/td> | 195K |
| 代理商： | TLC320AD81CDBT |
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A–2
Table A–1. Register Map (Continued)
REGISTER
ADDRESS
NO. of
BYTES
BYTE DESCRIPTION
Right
Biquad 0
0x13
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Right
Biquad 1
0x14
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Right
Biquad 2
0x15
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Right
Biquad 3
0x16
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Right
Biquad 4
0x17
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Right
Biquad 5
0x18
15
B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
Reserved
0x19 to
0xFF
The volume value is a 4.16 coefficient. In order to transmit it over I2C, it is necessary to separate the value into three
bytes. Byte 2 is the integer part and bytes 1 and 0 are the fractional parts.
The mixer gain values and biquad coefficients are 4.20 coefficients. In order to transmit them over I2C, it is necessary
to separate the value into three bytes. The first nibble of byte 2 is the integer part and the second nibble of byte 2 and
bytes 1 and 0 being the fractional parts.
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