- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98238 > TLC320AD81CDBT (TEXAS INSTRUMENTS INC) 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO38 PDF資料下載
參數(shù)資料
| 型號： | TLC320AD81CDBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO38 |
| 封裝： | PLASTIC, TSSOP-38 |
| 文件頁數(shù)： | 10/47頁 |
| 文件大小： | 195K |
| 代理商： | TLC320AD81CDBT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
2–6
2.8.2
Operation
The 7-bit address for the TLC320AD81C is 01101XX, where X is a programmable address bit. Using the
CS1 and CS2 pins on the device, the two LSB address bits may be programmed. These four addresses are
licensed I2C addresses and will not conflict with other licensed I2C audio devices. To communicate with the
TLC320AD81C, the I2C master must use 01101XX. In addition to the 7-bit device address, subaddresses
are used to direct communication to the proper memory location within the device. A complete table of
subaddresses and control registers is provided in the appendix A,
Software Interface. For example, to
change the bass setting to 10-dB gain, section 2.8.2.1,
Write Cycle shows how the data is written to the I2C
port:
Table 2–1. I2C Address Byte
I2C ADDRESS
BYTE
A6–A2
CS2(A1)
CS1(A0)
R/W
0x68
01101
0
0x6A
01101
0
1
0
0x6C
01101
1
0
0x6E
01101
1
0
The TLC320AD81 is a write only device.
2.8.2.1
Write Cycle
When writing to a subaddress, the correct number of data bytes must follow in order to complete the write
cycle. For example, if the volume control register with subaddress 04 (hex) is written to, six bytes of data
must follow, otherwise the cycle will be incomplete. The correct number of bytes corresponding to each
subaddress is shown in appendix A,
Software Interface.
Start
Slave Address
R/W
A
Subaddress
A
Data
A
Stop
FUNCTION
DESCRIPTION
Start
Start condition as defined in I2C
Slave Address
0110100 (CS1 = CS2 = 0)
R/W
0 (write)
A
Acknowledgement as defined in I2C (slave)
Sub-Address
00000110 (see appendix A,
Software Interface)
Data
00011100 (see appendix A,
Software Interface)
Stop
Stop condition as defined in I2C
NOTE: This table applies to serial data (SDA). Serial clock (SCL) information is not shown since the same conditions
apply as well.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC320AD81EVM | 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO38 |
| TLC320AD90CPMR | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| TLC320AD90CPM | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| TLC320AD90CFN | SPECIALTY CONSUMER CIRCUIT, PQCC64 |
| TLC3541IDGKR | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC320AD90 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio Codec |
| TLC320AD91 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio Codec |
| TLC320AD91CPT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLC320V320CFN | 制造商:Texas Instruments 功能描述: |
| TLC320V320CFNR | 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。