![](http://datasheet.mmic.net.cn/370000/TLC320AD75C_datasheet_16741835/TLC320AD75C_5.png)
v
List of Illustrations
Title
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–2 DAC-Reset Timing Relationships
Figure 2–3 Differential Analog-Input Configuration
Figure 2–4 ADC Audio-Data Serial Timing – Master Mode
Figure 2–5 ADC Audio-Data Serial Timing – Slave Mode
Figure 2–6 Audio Data Serial Timing – ADC and All DAC Modes
Figure 2–7 Control-Data Input Timing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–8 De-emphasis Filter Characteristics
Figure 2–9 Digital Attenuation Characteristics
Figure 2–10 DAC Digital Attenuation Operation With Tapered Gain Response
Figure 2–11 Oversampling Noise Power With and Without Noise Shaping
Figure 4–1 ADC Audio-Data Serial Timing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4–2 DAC Control-Data Serial Timing
Figure 5–1 TLC320AD75C Application Schematic
Figure 5–2 A-Weighted Function
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5–3 Land Pattern for PCB Layout
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure
Figure 2–1 ADC Start-Up Timing
Page
2–2
2–2
2–3
2–5
2–5
2–6
2–7
2–7
2–8
2–8
2–9
4–1
4–1
5–4
5–6
5–7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . .
. . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Tables
Title
Table
Table 2–1 ADC Master Clock to Sample-Rate Comparison
Table 2–2 DAC Master Clock to Sample-Rate Comparison
Table 2–3 Attenuation Mode Register
Table 2–4 System Mode Register
Table 5–1 TLC320AD75C Schematic Components
Table 5–2 A-Weighted Data
Page
2–4
2–4
2–10
2–11
5–1
5–6
. . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .