參數(shù)資料
型號(hào): TE28F008SA-100
廠商: INTEL CORP
元件分類: DRAM
英文描述: 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
中文描述: 1M X 8 FLASH 12V PROM, 100 ns, PDSO40
封裝: 10 X 20 MM, TSOP-40
文件頁數(shù): 30/48頁
文件大?。?/td> 304K
代理商: TE28F008SA-100
SMART 3 ADVANCED BOOT BLOCK
E
30
PRELIMINARY
4.6
AC Characteristics
—Write Operations
(1)
Product
3.0 V
– 3.6 V
80
100
2.7 V – 3.6 V
90
110
#
Symbol
t
PHWL
/
t
PHEL
t
ELWL
/
t
WLEL
t
ELEH
/
t
WLWH
t
DVWH
/
t
DVEH
t
AVWH
/
t
AVEH
t
WHEH
/
t
EHWH
t
WHDX
/
t
EHDX
t
WHAX
/
t
EHAX
t
WHWL
/
t
EHEL
t
VPWH
/
t
VPEH
Parameter
Note
Min
Min
Min
Min
Unit
W1
RP# High Recovery to WE#
(CE#) Going Low
600
600
600
600
ns
W2
CE# (WE#) Setup to WE#
(CE#) Going Low
0
0
0
0
ns
W3
WE# (CE#) Pulse Width
4
70
70
70
70
ns
W4
Data Setup to WE# (CE#)
Going High
2
50
50
60
60
ns
W5
Address Setup to WE# (CE#)
Going High
2
70
70
70
70
ns
W6
CE# (WE#) Hold Time from
WE# (CE#) High
0
0
0
0
ns
W7
Data Hold Time from WE#
(CE#) High
2
0
0
0
0
ns
W8
Address Hold Time from WE#
(CE#) High
2
0
0
0
0
ns
W9
WE# (CE#) Pulse Width High
4
30
30
30
30
ns
W10
V
Setup to WE# (CE#) Going
High
3
200
200
200
200
ns
W11
t
QVVL
V
PP
Hold from Valid SRD
3
0
0
0
0
ns
NOTES:
1.
2.
3.
4. Write pulse width (t
) is defined from CE# or WE# going low (whichever goes low last)
to CE# or WE# going high
(whichever goes high first). Hence, t
= t
= t
= t
= t
. Similarly, Write pulse width high (t
) is defined
from CE# or WE# going high (whichever goes high first)
to CE# or WE# going low (whichever goes low first). Hence, t
WPH
=
t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
Read timing characteristics during program suspend and erase suspend are the same as during read-only operations.
Refer to command definition table (Table 6) for valid A
IN
or D
IN
.
Sampled, but not 100% tested.
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