參數(shù)資料
型號: TE28F008S3-150
廠商: INTEL CORP
元件分類: DRAM
英文描述: BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述: 1M X 8 FLASH 2.7V PROM, 150 ns, PDSO40
封裝: 10 X 20 MM, TSOP-40
文件頁數(shù): 32/41頁
文件大?。?/td> 703K
代理商: TE28F008S3-150
BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY
E
32
PRELIMINARY
TEST POINTS
INPUT
OUTPUT
1.35
2.7
0.0
1.35
AC test inputs are driven at 2.7 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at
1.35 V. Input rise and fall times (10% to 90%) <10 ns.
Figure 12. Transient Input/Output Reference Waveform for V
CC
= 2.7 V
3.6 V
TEST POINTS
INPUT
OUTPUT
1.5
3.0
0.0
1.5
AC test inputs are driven at 3.0 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at 1.5 V.
Input rise and fall times (10% to 90%) <10 ns.
Figure 13. Transient Input/Output Reference Waveform for V
CC
= 3.3 V ± 0.3 V
DEVICE
UNDER
TEST
1.3V
1N914
R
L
C
L
OUT
= 3.3 K
NOTE:
C
L
includes Jig Capacitance
Figure 14. Transient Equivalent Testing
Load Circuit
Test Configuration Capacitance Loading Value
Test Configuration
C
L
(pF)
V
CC
= 3.3 V
±
0.3 V, 2.7 V
3.6 V
50
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