參數(shù)資料
型號: TDA8932TW
廠商: NXP SEMICONDUCTORS
元件分類: 音頻/視頻放大
英文描述: 25 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO32
封裝: 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT549-1, HTSSOP-32
文件頁數(shù): 42/45頁
文件大?。?/td> 285K
代理商: TDA8932TW
TDA8932_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 11 May 2006
6 of 45
Philips Semiconductors
TDA8932
Class-D audio amplier
8.
Functional description
8.1 General
The TDA8932 is a mono full-bridge or stereo half-bridge audio power amplier using
class-D technology. The audio input signal is converted into a Pulse Width Modulated
(PWM) signal via an analog input stage and PWM modulator. To enable the output power
Diffusion Metal Oxide Semiconductor (DMOS) transistors to be driven, this digital PWM
signal is applied to a control and handshake block and driver circuits for both the high side
and low side. A 2nd-order low-pass lter converts the PWM signal to an analog audio
signal across the loudspeakers.
The TDA8932 contains two independent half-bridges with full differential input stages. The
loudspeakers can be connected in the following congurations:
Mono full-bridge: Bridge Tied Load (BTL)
Stereo half-bridge: Single-Ended (SE)
The TDA8932 contains common circuits to both channels such as the oscillator, all
reference sources, the mode functionality and a digital timing manager. The following
protections are built-in: thermal foldback, temperature, current and voltage protections.
8.2 Mode selection and interfacing
The TDA8932 can be switched in three operating modes using pins POWERUP and
ENGAGE:
Sleep mode: with low supply current.
Mute mode: the ampliers are switching idle (50 % duty cycle), but the audio signal at
the output is suppressed by disabling the Vl-converter input stages. The capacitors on
pins HVP1 and HVP2 have been charged to half the supply voltage (asymmetrical
supply only).
Operating mode: the ampliers are fully operational with output signal.
Fault mode.
Both pins POWERUP and ENGAGE refer to pin CGND.
Table 4 shows the different modes as function of the voltages on the POWERUP and
ENGAGE pins.
[1]
In case of symmetrical supply conditions the voltage applied to pins POWERUP and ENGAGE must never
exceed the supply voltage (VDDA, VDDP1 or VDDP2).
Table 4.
Mode selection
Mode
Pin
POWERUP
ENGAGE
DIAG
Sleep
< 0.8 V
don’t care
Mute
2 V to 6.0 V[1]
< 0.8 V[1]
> 2 V
Operating
2 V to 6.0 V[1]
3 V to 6.0 V[1]
>2V
Fault
2 V to 6.0 V[1]
don’t care
< 0.8 V
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