參數(shù)資料
型號(hào): TDA8779
廠商: NXP Semiconductors N.V.
英文描述: 10-bit converter interface ADC/DAC for quadrature transceiver
中文描述: 10位ADC的轉(zhuǎn)換接口/ DAC的收發(fā)器的正交
文件頁(yè)數(shù): 7/20頁(yè)
文件大小: 149K
代理商: TDA8779
1996 Sep 18
7
Philips Semiconductors
Objective specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779
I
CCO
I
CCA1(stb)
I
CCA2(stb)
output stage supply current
analog standby current for ADC part
analog standby current for DAC part
ramp input; f
CLK
= 20 MHz
2
5
5
mA
mA
mA
ADC PART
C
LOCK INPUT
V
IL
V
IH
I
IL
I
IH
D
IGITAL INPUTS
:
PINS
OE
AND
STDBYA
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
2.2
10
10
0.6
V
CCD1
V
+10
+10
V
μ
A
μ
A
V
IL
V
IH
I
IL
I
IH
A
NALOG INPUTS
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
2.2
1
0
0.6
V
CCD1
V
+1
1
V
μ
A
μ
A
I
IL
I
IH
V
i(p-p)
LOW level input current
HIGH level input current
analog input voltage
(peak-to-peak value)
maximum analog input over voltage
(peak-to-peak value)
input impedance
input capacitance
for code 0
for code 1023
full-scale
tbf
tbf
tbf
1.5
tbf
μ
A
μ
A
V
V
i(p-p)over
overvoltage
4.5
V
Z
I
C
I
D
IGITAL OUTPUTS
: D0A
TO
D9A
10
3
k
pF
V
OL
V
OH
I
oZ
S
WITCHING CHARACTERISTICS
(see Fig.3)
LOW level output voltage
HIGH level output voltage
output current in 3-state mode
I
o
= 1 mA
I
o
=
1 mA
0.5 V < V
o
< V
CCO
0.5 V
0
V
CCO
0.5
20
0.5
V
CCO
+20
V
V
μ
A
f
CLKmax
t
CH
t
CL
t
r
t
f
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
clock rise time
clock fall time
20
20
20
4
4
MHz
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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