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參數(shù)資料
| 型號(hào)： | TDA8779 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 10-bit converter interface ADC/DAC for quadrature transceiver |
| 中文描述： | 10位ADC的轉(zhuǎn)換接口/ DAC的收發(fā)器的正交 |
| 文件頁(yè)數(shù)： | 10/20頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | TDA8779 |
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1996 Sep 18
10
Philips Semiconductors
Objective specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779
Notes
1.
2.
It is recommended that the DAC output voltage is AC coupled in order to achieve optimum performance.
The noise floor is the maximum value of the output spectrum without taking into account fundamental and harmonics
of the input signal.
Harmonics are obtained via a Fast Fourier Transformer (FFT) treatment taking 8K acquisition points per period.
3.
Matching between channel I and Q
V
amplitude matching
f
o
= 5.1 MHz;
f
CLK
= 20 MHz;
T
amb
= 25
°
C
f
o
= 5.1 MHz;
f
CLK
= 20 MHz;
T
amb
= 25
°
C
6
%
phase matching
2
Deg
DYNAMIC RANGE
; note 2
NF
noise floor
f
o
= 5.1 MHz;
f
CLK
= 20 MHz
60
dB
S
PURIOUS FREE DYNAMIC RANGE
SFDR
spurious free dynamic range
f
o
= 5.1 MHz;
f
CLK
= 20 MHz
50
dB
S
TANDBY MODE OUTPUT DELAY
; STDBYD
t
d(stb)LH
t
d(stb)HL
C
ROSSTALK ON THE
DAC
α
ct
crosstalk into the DAC
standby (LOW-to-HIGH transition)
start-up (HIGH-to-LOW transition)
100
100
μ
s
μ
s
f
CLK(DAC)
= 16.384 MHz;
f
CLK(ADC)
= 8.192 MHz;
T
amb
= 25
°
C; one DAC
switching between input
codes 0 and 1023 the other
DAC set at the middle
code; both ADCs 1 V (p-p)
sine wave at 4 MHz;
incoherent
55
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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