參數(shù)資料
型號(hào)： TDA8769
廠商： NXP Semiconductors N.V.
英文描述： 12-bit, 60/80/105 Msps Analog-to-Digital Converter (ADC) Nyquist/high IF sampling
中文描述： 12位，60/80/105 Msps的模擬到數(shù)字轉(zhuǎn)換器（ADC）奈奎斯特/ IF采樣高
文件頁(yè)數(shù)： 7/28頁(yè)
文件大?。?/td> 217K
代理商： TDA8769
2003 Dec 09
7
Philips Semiconductors
Objective specification
12-bit, 60/80/105 Msps Analog-to-Digital Converter
(ADC) Nyquist/high IF sampling
TDA8769
10 CHARACTERISTICS
V
CCA
= 4.75 to 5.25 V; V
CCD
= 4.75 to 5.25 V; V
CCO
= 2.7 to 3.6 V; AGND connected to DGND; T
amb
=
40 to +85
°
C;
V
IN(p
p)
V
INN(p
p)
= 1.9 V
0.5 dBFS; V
VREF
= V
CCA3
1.75 V; V
i(CM )
= V
CCA3
1.6 V; typical values measured at
V
CCA
= V
CCD
= 5 V, V
CCO
= 3.0 V, T
amb
= 25
°
C and C
L
= 10 pF; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
TEST
(1)
MIN.
TYP.
MAX.
UNIT
Supplies
V
CCA
analog supply
voltage
digital supply
voltage
output supply
voltage
analog supply
current
digital supply
current
output supply
current
total power
dissipation
4.75
5.0
5.25
V
V
CCD
4.75
5.0
5.25
V
V
CCO
2.7
3.0
3.6
V
I
CCA
109
(tbf)
mA
I
CCD
48
(tbf)
mA
I
CCO
f
CLK
= 80 Msps;
f
i
= 21.4 MHz
f
CLK
= 60 Msps;
f
i
= 21.4 MHz
f
CLK
= 80 Msps;
f
i
= 21.4 MHz
f
CLK
= 105 Msps;
f
i
= 21.4 MHz
17.5
(tbf)
mA
P
tot
825
(tbf)
mW
840
(tbf)
mW
855
(tbf)
mW
Clock inputs: pins CLK and CLKN;
note 2
I
NPUTS
V
IL
LOW-level input
voltage
referenced to DGND;
V
CCD
= 5 V
PECL mode
TTL mode
referenced to DGND;
V
CCD
= 5 V
PECL mode
TTL mode
V
CLK
or V
CLKN
= 3.52 V
V
CLK
or V
CLKN
= 0.80 V
V
CLK
or V
CLKN
= 3.83 V
V
CLK
or V
CLKN
= 2.00 V
V
CLK
= V
CLK
V
CLKN
;
AC mode; DC voltage
level = 2.5 V
f
CLK
= 105 Msps
f
CLK
= 105 Msps
3.19
DGND
3.52
0.8
V
V
V
IH
HIGH-level input
voltage
3.83
2.0
(tbf)
(tbf)
(tbf)
1.5
4.12
V
CCD
(tbf)
(tbf)
(tbf)
V
V
μ
A
mA
μ
A
mA
V
I
IL
LOW-level input
current
I
IH
HIGH-level input
current
V
CLK
differential AC
input voltage for
switching
input resistance
input
capacitance
R
i
C
i
(tbf)
(tbf)
M
pF
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