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參數(shù)資料
| 型號： | TDA8769 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 12-bit, 60/80/105 Msps Analog-to-Digital Converter (ADC) Nyquist/high IF sampling |
| 中文描述： | 12位，60/80/105 Msps的模擬到數(shù)字轉(zhuǎn)換器（ADC）奈奎斯特/ IF采樣高 |
| 文件頁數(shù)： | 12/28頁 |
| 文件大?。?/td> | 217K |
| 代理商： | TDA8769 |
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2003 Dec 09
12
Philips Semiconductors
Objective specification
12-bit, 60/80/105 Msps Analog-to-Digital Converter
(ADC) Nyquist/high IF sampling
TDA8769
2.
The circuit has two clock inputs: CLK and CLKN. There are 5 modes of operation:
a) PECL mode 1: (DC level varies proportionally with V
CCD
) CLK and CLKN inputs are at differential PECL levels.
b) PECL mode 2: (DC level varies proportionally with V
CCD
) CLK input is at PECL level and sampling is taken on
the falling edge of the clock input signal. A DC level of 3.65 V has to be applied on CLKN decoupled to GND via
a 100 nF capacitor.
c) PECL mode 3: (DC level varies proportionally with V
CCD
) CLKN input is at PECL level and sampling is taken on
the rising edge of the clock input signal. A DC level of 3.65 V has to be applied on CLK decoupled to GND via a
100 nF capacitor.
d) Differential AC driving mode 4: When driving the CLK input directly and with any AC signal of minimum 1 V (p-p)
and with a DC level of 2.5 V, the sampling takes place at the falling edge of the clock signal. When driving the
CLKN input with the same signal, sampling takes place at the rising edge of the clock signal. It is recommended
to decouple the CLKN or CLK input to DGND via a 100 nF capacitor.
e) TTL mode 5: CLK input is at TTL level and sampling is taken on the falling edge of the clock input signal. In that
case CLKN pin has to be connected to the ground.
The ADC input range can be adjusted with an external reference connected to pin VREF. This voltage has to be
referenced to V
CCA
.
Output data acquisition: the output data is available after the maximum delay of t
d(s)
.
The
3 dB analog bandwidth is determined by the 3 dB reduction in the reconstructed output, the input being a
full-scale sine wave.
The total harmonic distortion is obtained with the addition of the first five harmonics.
The signal-to-noise ratio takes into account all harmonics above five and noise up to Nyquist frequency.
The effective number of bits, or ENOB, are obtained via a Fast Fourier Transform (FFT). The calculation takes into
account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to signal-to-noise
and distortion, or SINAD, is given by SINAD = ENOB
×
6.02 + 1.76 dB.
Intermodulation measured relative to either tone with analog input frequencies of (tbf) and (tbf) MHz. The two input
signals have the same amplitude and the total amplitude of both signals provides full-scale input to the converter
(
6 dB below full-scale for each input signal).
10. IM2 is the ratio of the RMS value of either input tone to the RMS value of the worst case second order intermodulation
product. IM3 is the ratio of the RMS value of either input tone to the RMS value of the worst case third order
intermodulation product.
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