參數(shù)資料
型號： TDA8505
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉(zhuǎn)換
英文描述： SECAM encoder
中文描述： COLOR SIGNAL ENCODER, PDIP32
封裝： PLASTIC, SOT-232-1, SDIP-32
文件頁數(shù)： 4/32頁
文件大?。?/td> 466K
代理商： TDA8505
July 1994
4
Philips Semiconductors
Preliminary specification
SECAM encoder
TDA8505
PINNING
D'R and D'B are the colour difference signals at the output of the multiplexer circuit; D'R =
1.9(R
Y) and
D'B = +1.5(B
Y), for an EBU bar of 75% the amplitudes are equal.
SYMBOL
(R
Y)
MCONTR
(B
Y)
FH/2
PIN
DESCRIPTION
1
2
3
4
colour difference input signal, for EBU bar of 75% 1.05 V (peak-to-peak value)
multiplexer control; input HIGH = RGB, input LOW =
(R
Y),
(B
Y) and Y
colour difference input signal, for EBU bar of 75% 1.33 V (peak-to-peak value)
line pulse input divided-by-2 for synchronizing two or more encoders; when not used this
pin is connected to ground
luminance input signal 1 V nominal without sync
test pin; must be connected to V
CC
(pin 8), or left open-circuit
RED input signal for EBU bar of 75% 0.7 V (peak-to-peak value)
analog supply voltage for encoder part; 5 V nominal
GREEN input signal for EBU bar of 75% 0.7 V (peak-to-peak value)
analog ground
BLUE input signal for EBU bar of 75% 0.7 V (peak-to-peak value)
when this control input is LOW, Y without sync is connected to pin 5, input blanking at
pin 5 is active; when input is HIGH, Y+SYNC is connected to pin 5, input blanking at pin 5
is not active
modulator control loop filter output; black level of D'R = 4.40625 MHz
adjustment pin for 4.286 MHz of HF pre-emphasis filter
modulator control loop filter output; black level of D'B = 4.250 MHz
filter tuning loop capacitor output
2.5 V internal reference voltage output
chrominance output, amplitude corresponds with Y+SYNC at the output of the delay line
external power supply for sandcastle generation; when not used this pin is connected to
ground
3-level sandcastle output pulse
composite SECAM output 2 V (peak-to-peak value) nominal
Y+SYNC output after an internal resistor of 2 k
; a notch filter can be connected
Y+SYNC input, connected to the output of the delay line
loop filter output for 4.40625 MHz reference oscillator
Y+SYNC output, 2 V (peak-to-peak value) nominal, connected to the input of the
delay line
control pin; input HIGH = crystal tuning, input LOW = PLL tuning, both
without
vertical
identification, 2.5 V = PLL tuning
with
vertical identification
when used for PLL tuning a capacitor is connected; when used for crystal tuning a crystal
has to be connected (in series with a capacitor)
colour killing; input HIGH = active, internal colour difference signals are blanked
composite sync input, 0.3 V (peak-to-peak value) nominal
Y
TEST
R
V
DDA
G
V
SSA
B
Y/Y+SYNC
5
6
7
8
9
10
11
12
LPFDR
FADJ
LPFDB
FLT
V
ref
CHROMA
V
ext
13
14
15
16
17
18
19
SAND
CVBS
NOTCH
Y+SYNC IN
LPF4.4
Y+SYNC OUT
20
21
22
23
24
25
XTAL/PLL
VIDENT
VCO4.25
26
27
COLKIL
CS
28
29
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