參數(shù)資料
型號： TDA8020HL/C1
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-1, LQFP-32
文件頁數(shù)： 4/28頁
文件大小： 137K
代理商： TDA8020HL/C1
2003 Nov 06
12
Philips Semiconductors
Product specication
Dual IC card interface
TDA8020HL
Deactivation is initiated either by the system controller
(reset bit START), or automatically in the event of a
hardware problem or supply drop-out. With a supply
drop-out both cards are deactivated at the same time.
During deactivation, RST goes LOW, the clock is stopped
and the I/O lines go LOW. VCC then goes low with a
controlled slope and the DC-to-DC converter is stopped if
no card is active.
Outside a session, cards contacts are forced low
impedance to CGND.
DEVICE TYPE TDA8020HL/C2:
1. If a start bit is detected on the I/O during the first
200 CLK pulses, it is ignored and the count continues.
2. If a start bit is detected whilst RST is LOW (between
200 and 42100 CLK pulses), bits EARLY and MUTE
are set in the status register; RST will remain LOW; the
software decides whether to accept the card or not.
3. If no start bit has been detected until after 42100 CLK
pulses, RST is set to logic 1.
4. If a start bit is detected within 370 CLK pulses, bit
EARLY is set in the status register.
5. If the card does not respond within the next 42100
CLK pulses, bit MUTE is set within the status register.
This initiates a warm reset command.
6. If the card responds within the correct window period,
the CLK count is stopped and the system controller
may send commands to the card.
Deactivation is initiated either by the system controller
(reset bit START), or automatically in the event of a
hardware problem or supply drop-out. With a supply
drop-out both cards are deactivated at the same time.
During deactivation, RST goes LOW, the clock is stopped
and the I/O lines go LOW. VCC then goes low with a
controlled slope and the DC-to-DC converter is stopped if
no card is active.
Outside a session, cards contacts are forced low
impedance to CGND.
Activation sequence
When the cards are inactive, VCC, CLK, RST and I/O are
LOW, with low impedance with respect to CGND. The
DC-to-DC converter is stopped.
When everything is satisfactory (voltage supply, card
present and no hardware problems), the system controller
may initiate a card present activation sequence
(see Fig.4):
1. The internal oscillator changes to its high frequency
(t0).
2. The DC-to-DC converter is started (t1). If one card was
already active, then the DC-to-DC converter was
already on, and nothing more occurs at this step.
3. VCC starts rising from 0 to 5 or 3 V with a controlled
rise time of 0.14 V/
s typical (t2).
4. I/O rises to VCC (t3); internal 14 k pull-up resistors to
VCC.
5. CLK is sent to the card and RST is enabled (t4 = tact).
If the card does not respond within the first 42100 CLK
cycles, then RST is raised HIGH (t5).
The sequencer is clocked by fint/64 which leads to a time
interval T of 25
s typical. Thus t1 = 0 to T/64;
t2 = t1 + 3T/2; t3 = t1 + 7T/2 and t4 = t1 + 4T.
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