參數(shù)資料
型號(hào): TDA8020HL/C1
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-1, LQFP-32
文件頁(yè)數(shù): 10/28頁(yè)
文件大?。?/td> 137K
代理商: TDA8020HL/C1
2003 Nov 06
18
Philips Semiconductors
Product specication
Dual IC card interface
TDA8020HL
Clock output to the cards (pins CLK1 and CLK2)
Vo(inactive)
output voltage in inactive
mode
no load
0
0.1
V
Iinactive = 1 mA
0
0.3
V
Io(inactive)
output current from pin CLK
when inactive
pin grounded
0
1mA
VOL
LOW-level output voltage
IOL = 200 A0
0.3
V
VOH
HIGH-level output voltage
IOH < 200 AVCC 0.5
VCC
V
tr
rise time
CL =30pF
8ns
tf
fall time
CL =30pF
8ns
fclk
clock frequency
operational
0
10
MHz
δ
duty factor
CL =30pF
45
55
%
SR
slew rate (rise and fall)
CL = 30 pF
0.2
V/ns
Data lines (pins I/O1 and I/O2); note 2
Vo(inactive)
output voltage in inactive
mode
no load
0
0.1
V
Iinactive =1mA
0.3
V
Io(inactive)
current from pin I/O when
inactive
pin grounded
1mA
VOL
LOW-level output voltage
IOL = 1 mA
0
0.3
V
VOH
HIGH-level output voltage
no DC load
0.9VCC
VCC + 0.1 V
IOH < 20 A
0.8VCC
VCC + 0.1 V
IOH < 40 A
0.75VCC
VCC + 0.1 V
Iedge
current from pins I/O1
and I/O2 when active pull-up
VOH = 0.9 VCC; CL =30pF
1
mA
td(edge)
delay between falling edge
on pins I/O1, I/O2 and width
of active pull-up pulse
500
650
ns
VIL
LOW-level input voltage
0.3
+0.8
V
VIH
HIGH-level input voltage
1.5
VCC
V
IIL
LOW-level input current on
pin I/O
VIL = 0; VCC =5V
600
A
VIL = 0; VCC =3V
500
A
ILIH
HIGH-level input leakage
current on pin I/O
VIH =VCC
10
A
ti(r),ti(f)
input transition times
from VIL(max) to VIH(min)
1.5
s
to(r),to(f)
output transition times
CL < 30 pF; no DC load;
10% to 90% from 0 V to
VCC1 and VCC2
0.1
s
Ci
input capacitance on
pins I/O1 and I/O2
10
pF
Rpu(int)
internal pull-up resistance
between pin I/O and VCC
10
14
18
k
fmax
maximum frequency on
pins I/O1 and I/O2
500
kHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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