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參數(shù)資料
| 型號： | TDA8020HL/C1 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-1, LQFP-32 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 137K |
| 代理商： | TDA8020HL/C1 |
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2003 Nov 06
10
Philips Semiconductors
Product specication
Dual IC card interface
TDA8020HL
WRITE SEQUENCE
The write sequence is as follows:
1. START condition
2. Byte 1: ADDRESS plus write command
3. ACK: acknowledge
4. Byte 2: CONTROL byte; see Table 3
5. ACK: acknowledge
6. STOP condition.
Table 3
CONTROL byte bits (all bits cleared after power-on)
All frequency changes are synchronous, thus ensuring that no pulse is shorter than 45% of the smallest period. For cards
power reduction modes, CLKIN may be stopped after switching to stop LOW or stop HIGH. CLKIN should be restarted
before leaving this mode and the selected frequency must not be changed during a CLK stop mode.
A correct duty factor can not be guaranteed in the CLKIN configuration, as it depends on the duty factor of the CLKIN
signal.
BIT
NAME
DESCRIPTION
0START/STOP when set, initiates an activation and a cold reset procedure; when reset, initiates a deactivation
sequence
1
WARM
when set, initiates a warm reset procedure; automatically reset by hardware when the card starts
answering or when the card is declared mute (once the status has been read)
2
3V/ 5 V
when set; VCC = 3 V; when reset; VCC =5V
3
PDOWN
when set, the conguration dened by bit CLKPD is applied to pin CLK, and the circuit enters the
Power-down mode; when reset, the circuit goes back to normal (active) mode
4
CLKPD
when set, CLK is stopped HIGH during Power-down mode; when reset, CLK is stopped LOW in
Power-down mode
5
CLKSEL1
determine the clock to the card in active mode:
6
CLKSEL2
00: CLKIN/8
01: CLKIN/4
10: CLKIN/2
11: CLKIN
7
I/OEN
when set, I/O data is transferred on pin I/OuC; when reset, pin I/OuC is high-impedance
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