參數(shù)資料
型號： TDA8020HL/C1
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-1, LQFP-32
文件頁數(shù)： 3/28頁
文件大小： 137K
代理商： TDA8020HL/C1
2003 Nov 06
11
Philips Semiconductors
Product specication
Dual IC card interface
TDA8020HL
READ STATUS SEQUENCE
The read status sequence is as follows:
1. START condition
2. Byte 1: ADDRESS plus read command
3. ACK: acknowledge
4. Byte 2: STATUS byte; see Table 4
5. ACK: acknowledge
6. STOP condition.
Table 4
STATUS byte bits (all bits cleared after power-on)
When one of the bits PRESL, MUTE, EARLY and PROT is set, then IRQ goes LOW until the status byte has been read.
After power-on, bit SUPL is set until the status byte has been read, and IRQ is LOW until the supervisor becomes
inactive.
BIT
NAME
DESCRIPTION
0
PRES
set when the card is present; reset when the card is not present
1
PRESL
set when the card has been inserted or extracted; reset when the status has been read
2
I/O
set when I/O is HIGH; reset when I/O is LOW
3
SUPL
set when the supervisor has signalled a fault; reset when the status has been read
4
PROT
set when an overload or an overheating has occurred during a session; reset when the status
has been read
5
MUTE
set during ATR when the selected card has not answered during the ISO 7816 time slots; reset
when the status has been read
6
EARLY
set during ATR when the selected card has answered too early; reset when the status has been
read
7
ACTIVE
set if the card is active; reset if the card is inactive
Sequencers and clock counter
Two sequencers are used to ensure activation and
deactivation sequences according to ISO 7816 and
EMV 2000, even in the event of an emergency (card
removal during transaction, supply drop-out and hardware
problem).
The sequencers are clocked by the internal oscillator.
The activation of a card is initiated by setting the card
select bit and the start bit within the control register. This is
only possible if the card is present and if the voltage
supervisor is not active.
During activation the DC-to-DC converter is initiated
(except if another card is already powered up or if
VDD = 5 V and VCC = 3 V). VCC then goes high to the
selected voltage (3 or 5 V), the I/O lines are then enabled
and the clock is started with RST LOW.
DEVICE TYPE TDA8020HL/C1:
1. If a start bit is detected on the I/O during the first
200 CLK pulses, it is ignored and the count continues.
2. If a start bit is detected between 200 and 352 CLK
pulses, bit EARLY is set in the status register.
3. If the card starts responding within 41950 CLK pulses,
RST remains LOW.
4. If the card has not responded within 41950 CLK
pulses, then RST goes HIGH.
5. If a start bit is detected within 352 CLK pulses, bit
EARLY is set in the status register.
6. If the card does not respond within the next 41950
CLK pulses, bit MUTE is set within the status register.
This initiates a warm reset command.
7. If the card responds within the correct window period,
the CLK count is stopped and the system controller
may send commands to the card.
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