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參數(shù)資料
| 型號： | TB2118FG |
| 廠商： | Toshiba Corporation |
| 英文描述： | High Speed PLL For DTS |
| 中文描述： | 高高速PLL為DTS |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 348K |
| 代理商： | TB2118FG |
TB2118FG
2006-04-12
4
Pin Function
Pin
No.
Symbol
Pin Name
Function And Operation
Remarks
7
SR
Register
control pin.
Selects register 1 or 2.
"L" = register 1 output
"H" = register 2 output
―
8
I / O
1
9
I / O
2
I / O ports
Input or output is switched in units of
bits by serial data input.
CMOS input / CMOS output
At power on, set to input ports.
V
DD
10
OUT
1
11
OUT
2
Output ports
Open collector output ports.
12
V
DD2
Single power supply for reference
frequency block
V
DD2
= 3.0 to 5.5V
(note that V
DD
≥
V
DD2
)
Due to the crystal high
frequency
receive interference characteristic, we
recommend an R
D
setting so that
V
DD2
= 3.5V.
14
12
V
DD
V
DD2
R
D
14
V
DD
17
D
GND
CMOS power
pins
Power pins for digital block (digital
circuits).
V
CC
= 4.5 to 5.5V, D
GND = 0V
21
V
CC
23
A
GND
Bipolar power
pins
Power pins for analog block (eg, op
amps, constant
voltage supply)
V
CC
= 8 to 10V, A
GND = 0V
―
22
REG.
Ripple filter
connecting pin.
Ripple filter connecting pin for internal
constant voltage supply. Insert about
10μF (as high as possible) between this
pin and A
GND.
―
19
V
T
Tuning voltage
Input from the plus terminal of the
op
amp is internally biased to 2.5V.
External crystal for phase correction is
required because low gain is set by
high through rate.
21
+
1
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