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參數(shù)資料
| 型號(hào)： | TB2118FG |
| 廠商： | Toshiba Corporation |
| 英文描述： | High Speed PLL For DTS |
| 中文描述： | 高高速PLL為DTS |
| 文件頁(yè)數(shù)： | 12/20頁(yè) |
| 文件大?。?/td> | 348K |
| 代理商： | TB2118FG |
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TB2118FG
2006-04-12
12
5. Control of general
purpose counter circuit
The general
purpose counter is a 20
bit counter used to measure the intermediate frequency. This is used at
auto tuning for detecting a radio station. Setting "1" in the start bit starts counting after counter reset.
1) Circuit configuration
2) Setting IF counter gate time / wait time (G
0
, G
1
)
G
0
G
1
Gate Time
Wait Time
0
0
1ms
1
0
4ms
3.3~4.3ms
0
1
16ms
1
1
64ms
7.3~8.3ms
3) Counter output data (C
00
to C
19
)
2
0
13
20
bit
binary counter
Overflow
detection
IFC
Gate time control circuit
Busy
detector
Start
G
0
G
1
Reset
Busy
Over
C
00 to
C
19
LSB
MSB
2
19
C
0
C
0
C
0
C
0
C
0
C
0
C
0
C
0
C
0
C
0
C
1
C
1
C
1
C
1
C
1
C
1
C
1
C
1
C
1
C
1
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