參數(shù)資料
型號(hào): T89C51CC02UA-TISIM
廠商: Atmel
文件頁數(shù): 5/159頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 16K 28SOIC
標(biāo)準(zhǔn)包裝: 27
系列: AT89C CAN
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 2K x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
配用: AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名稱: T89C51CC02UATISIM
102
AT/T89C51CC02
4126L–CAN–01/08
Table 67. CANBT3 Register
CANBT3 (S:B6h)
CAN bit Timing Registers 3
Note:
1. The CAN controller bit timing registers must be accessed only if the CAN controller is
disabled with the ENA bit of the CANGCON register set to 0.
No default value after reset.
765
43210
-
PHS2 2
PHS2 1
PHS2 0
PHS1 2
PHS1 1
PHS1 0
SMP
Bit Number
Bit Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6 - 4
PHS2 2:0
Phase Segment 2
This phase is used to compensate for phase edge errors. This
segment can be shortened by the re-synchronization jump width.
Phasse segment 2 is the maximum of Phase segment1 and the
Information Processing Time (= 2TQ).
3 - 1
PHS1 2:0
Phase Segment 1
This phase is used to compensate for phase edge errors. This
segment can be lengthened by the re-synchronization jump width.
0SMP
Sample Type
0 - once, at the sample point.
1 - three times, the threefold sampling of the bus is the sample
point and twice over a distance of a 1/2 period of the Tscl. The
result corresponds to the majority decision of the three values.
Tphs2 = Tscl x (PHS2[2..0] + 1)
Tphs1 = Tscl x (PHS1[2..0] + 1)
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