參數(shù)資料
型號： T7689
廠商： Lineage Power
英文描述： 5.0 V T1 Quad Line Interface(5.0 V T1四線接口)
中文描述： 5.0V的T1四線接口（5.0V的T1四線接口）
文件頁數(shù)： 3/38頁
文件大小： 548K
代理商： T7689
Data Sheet
May 1998
T7689 5.0 V T1 Quad Line Interface
3
Lucent Technologies Inc.
Block Diagram
The T7689 block diagram is shown in Figure 1. For illustration purposes, only one of the four on-chip line interfaces
is shown. Pin names that apply to all four channels are followed by the designation [1—4].
5-3683(C)r.7
* Function can be bypassed by using the microprocessor interface.
Figure 1. Block Diagram (Single Channel)
FLLOOP
(NO BLUE SIGNAL)
DLOS
CLOCK/DATA
RECOVERY*
SLICERS
EQUALIZER
ALOS
JITTER
ATTENUATOR*
(TRANSMIT OR
RECEIVE PATH)
BPV
DECODER*
LOTC
TDM
PULSE-
WIDTH
CONTROLLER
PULSE
EQUALIZER
ENCODER*
BLUE
SIGNAL
(AIS)
LOXC
÷
16
JITTER
ATTENUATOR*
(TRANSMIT OR
RECEIVE PATH)
MICROPROCESSOR
INTERFACE
RND/BPV[1—4]
RCLK/ALOS[1—4]
RTIP[1—4]
RRING[1—4]
XCLK
XCLK
TCLK[1—4]
TPD/TDATA[1—4]
TND[1—4]
BCLK
TTIP[1—4]
TRING[1—4]
LOXC
XCLK
XCLK
MPCLK
MPMODE
MPMUX
CS
ALE_AS
RD_R/W
WR_DS
INT
RDY_DTACK
AD[7:0]
A[3:0]
FLLOOP (DURING BLUE SIGNAL)
DRIVERS
RPD/RDATA[1—4]
SYSTEM
INTER-
FACE
LINE
INTER-
FACE
D
R
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