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Lucent Technologies Inc.
3
Data Sheet
February 1999
Codec Chip Set
T7531A/T7536 16-Channel Programmable
Table of Contents
Tables
Page
Table 1. T7536 Pin Descriptions ............................................................................................................................. 9
Table 2. T7531A Pin Descriptions ........................................................................................................................ 10
Table 3. Active Time-Slot Spacing in a PCM Bus Frame ...................................................................................... 15
Table 4. DSP Engine RAM Map for Channel_0 ac Path Coefficients ................................................................... 17
Table 5A. Bit Maps for DSP Engine Time-Slot Control Word .............................................................................. 18
Table 5B. Bit Map for Default Per-Board Coefficient Tables ................................................................................... 18
Table 6. DSP Engine RAM Map for Time-Slot Information Table 0 ....................................................................... 18
Table 7. Summary of Microprocessor Commands for Control of T7531A Data Processing ................................. 20
Table 8. Digital Interface ....................................................................................................................................... 24
Table 9. Analog Interface ...................................................................................................................................... 24
Table 10. T7536 Power Dissipation ...................................................................................................................... 25
Table 11. T7531A Power Dissipation .................................................................................................................... 25
Table 12. Gain and Dynamic Range ..................................................................................................................... 25
Table 13. Noise (per Channel) .............................................................................................................................. 27
Table 14. Distortion and Group Delay .................................................................................................................. 28
Table 15. Crosstalk ............................................................................................................................................... 28
Table 16. PCM Interface Timing ............................................................................................................................ 29
Table 17. Serial Control Port Timing ...................................................................................................................... 31
Table 18. DSP Engine RAM Memory Map ........................................................................................................... 32
Table 19. T7531A Time-Slot Assignment Memory Map ........................................................................................ 34
Table 20A. Bit Map for T7531A Time-Slot Assignment Registers at 0x1400—0x140F ........................................ 34
Table 20B. Bit Map for CTZ Disable and Null Channel ......................................................................................... 34
Table 21. T7531A Channel Register Memory Map for T7536 Device 0 ................................................................ 35
Table 22. T7531A Channel Register Memory Map for T7536 Device 1 ................................................................ 35
Table 23. Bit Map for T7536 Powerup/Powerdown Registers at 0x1500—0x1507 and 0x1540—0x1547 ............ 35
Table 24. Bit Map for T7536 Channel Control Register 1 at 0x1508—0x150F and 0x1548—0x154F .................. 36
Table 25. T7536 Control Register 1: Transmit Gain .............................................................................................. 36
Table 26. T7536 Control Register 1: Analog Termination Impedance ................................................................... 36
Table 27. T7536 Control Register 1: Digital Loopback .......................................................................................... 37
Table 28. Bit Map for T7536 All Channel Test Register at 0x1510 and 0x1550 .................................................... 37
Table 29. Bits 3:0 of T7536 All Channel Test Register at 0x1510 and 0x1550 ...................................................... 37
Table 30. Bit Map for T7536 Channel Control Register 2 at 0x1518—0x151F and 0x1558—0x155F .................. 38
Table 31. T7536 Control Register 2: Receive Gain ............................................................................................... 38
Table 32. T7531A Control Register Map ............................................................................................................... 38
Table 33. Bits 15:8 of T7531A Board Control Word 1 at 0x1FFE ......................................................................... 39
Table 34. Bits 7:0 of T7531A Board Control Word 1 at 0x1FFE ........................................................................... 39
Table 35. Bits 15:9 of T7531A Board Control Word 2 at 0x1FFC ......................................................................... 40
Table 36. Bits 8:0 of T7531A Board Control Word 2 at 0x1FFC ........................................................................... 40
Table 37. Bits 15:0 of T7531A Board Control Word 3 at 0x1FFA ......................................................................... 40
Table 38. Bits 15:0 of T7531A Board Control Word 4 at 0x1FF8 ......................................................................... 40
Table 39. Bits 15:0 of T7531A Board Control Word 5 at 0x1FF6 ......................................................................... 40
Table 40. Bits 15:0 of T7531A Reset of Microprocessor Commands at 0x7FFF ................................................. 40
Table 41. DSP Engine ROM Memory Map ........................................................................................................... 41