
Signal Descriptions
2-9
2.7.4 Reset (RST) Control
A_SRST/ and B_SRST
±
are also passed from the source to the load
bus. These reset signals are processed in the following steps.
1.
The input signal is blocked if it is already being driven by the
SYM53C141.
2.
The next stage is a leading edge filter. This ensures that the output
does not switch for a specified time after the leading edge. The
duration of the input signal then determines the duration of the
output.
3.
A parallel function ensures that bus (transmission line) recovery is
ensured for a specified time after the last signal deassertion on each
signal line.
2.7.5 Control/Data (C/D), Input/Output (I/O), Message (MSG) and
Attention (ATN) Controls
A_SCD/, A_SIO/, A_SMSG/, A_SATN/, B_SCD
±
, B_SIO
±
, B_SMSG
±,
and B_SATN
±
are control signals that have the following processing
steps:
1.
The input signal is blocked if it is being driven by the SYM53C141.
2.
The next stage is a leading edge filter. This ensures that the output
does not switch for a specified time after the leading edge. The
duration of the input signal determines the duration of the output.
3.
The final stage develops pull-up and pull-down controls for the SCSI
I/O logic, including 3-state controls for the pull-up.
4.
A parallel function ensures that bus (transmission line) recovery is for
a specified time after the last signal deassertion on each signal line.
2.7.6 Select (SEL) Control
A_SSEL/ and B_SSEL
±
are control signals used during bus arbitration
and selection. Whichever bus asserts SEL propagates it to the other
side. If both signals are asserted at the same time, the A-side receives
SEL and sends it to the B-side. The signal goes through the following
processing steps.
1.
The input signal is blocked if it is being driven by the SYM53C141.