參數(shù)資料
型號(hào): SYM53C141
廠商: LSI CORP
元件分類: 微控制器/微處理器
英文描述: SCSI Bus Expander(SCSI總線擴(kuò)展器)
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 21/68頁
文件大?。?/td> 630K
代理商: SYM53C141
SCSI A-Side and B-Side Single-Ended Control Blocks
2-3
rates up to the 40 Mbytes/s rate of Wide Ultra SCSI. LVD Link technology
is part of the SCSI B-side single-ended control block. TolerANT
technology is part of the SCSI A-side single-ended control block.
2.1.1 TolerANT Technology
The SYM53C141 features TolerANT technology, which includes active
negation on the SCSI drivers and input signal filtering on the SCSI
receivers. Active negation causes the SCSI Request, Acknowledge,
Data, and Parity signals to be actively driven high rather than passively
pulled up by terminators.
TolerANT receiver technology improves data integrity in unreliable
cabling environments, where other devices would be subject to data
corruption. TolerANT receivers filter the SCSI bus signals to eliminate
unwanted transitions, without the long signal delay associated with
RC-type input filters. This improved driver and receiver technology helps
eliminate double clocking of data, which is the single biggest reliability
issue with SCSI operations.
The benefits of TolerANT include increased immunity to noise on the
deasserting signal edge, better performance due to balanced duty
cycles, and improved SCSI transfer rates. In addition, TolerANT SCSI
devices prevent glitches on the SCSI bus at power up or power down, so
other devices on the bus are also protected from data corruption.
2.1.2 LVD Link Technology
To support greater device connectivity and a longer SCSI cable, the
SYM53C141 features LVD Link technology, the LSI Logic implementation
of universal LVD SCSI. LVD Link transceivers provide the inherent
reliability of differential SCSI, and a long-term migration path of faster
SCSI transfer rates.
LVD Link technology is based on current drive. Since its low output
current reduces the power needed to drive the SCSI bus, the I/O drivers
can be integrated directly onto the chip. This reduces the cost and
complexity compared to traditional (high power) differential designs. LVD
Link lowers the amplitude of noise reflections and allows higher
transmission frequencies.
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