- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385894 > SYM53C141 (LSI CORP) SCSI Bus Expander(SCSI總線擴展器) PDF資料下載
參數(shù)資料
| 型號： | SYM53C141 |
| 廠商： | LSI CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SCSI Bus Expander(SCSI總線擴展器) |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 22/68頁 |
| 文件大?。?/td> | 630K |
| 代理商： | SYM53C141 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
2-4
Functional Description
The LVD Link transceivers operate in LVD and SE modes. The
SYM53C141 automatically detects which type of signal is connected,
based on voltage detected by DIFFSENS, pin 46.
2.2 Retiming Logic
The SCSI signals, as they propagate from one side of the SYM53C141
to the other side, are processed by logic that retimes the bus signals as
needed to guarantee or improve required SCSI timings. This logic is
governed by the state machine controls that keep track of SCSI phases,
the location of initiator and target devices, and various timing functions.
In addition, this logic contains numerous precision delay elements that
are periodically calibrated by the precision delay control block. The
purpose of this calibration is to guarantee specified timings, such as
output pulse widths, setup and hold times, and other timings.
2.3 Precision Delay Control
The precision delay control block provides calibration information to the
precision delay elements in the retiming logic block. The purpose of this
information is to maintain precise timings as signals propagate through
the device. The operating conditions for the SYM53C141, such as
voltage and temperature, vary over time. The precision delay control
block periodically updates the delay settings in the retiming logic to
maintain constant and precise control over bus timings.
2.4 State Machine Control
The state machine controls keep track of the SCSI bus phase protocol
and other internal operating conditions. This block provides signals to the
retiming logic that identifies how to properly handle SCSI bus signal
retiming and protocol, based on observed bus conditions.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SYM53C180 | Ultra3 SCSI Bus Expander(Ultra2 SCSI總線擴展器) |
| SYM53C710 | 32-Bit SCSI I/O Processor(32位SCSI I/O處理器) |
| SYM53C770 | SCSI I/O Processor With Ultra SCSI(帶超級SCSI的SCSI I/O處理器) |
| SYM53C810A | PCI-SCSI I/O Processor(PCI-SCSI I/O接口處理器) |
| SYM53C825A | PCI-SCSI I/O Processor(PCI-SCSI I/O接口處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SYM53C400A | 制造商:SYMBIOS 功能描述: |
| SYM53C770 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SCSI Bus Interface/Controller |
| SYM53C876E(PBGA) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SCSI Bus Interface/Controller |
| SYM53C876E(PQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SCSI Bus Interface/Controller |
| SYM53C885 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
發(fā)布緊急采購，3分鐘左右您將得到回復。