參數(shù)資料
型號: STW5094
廠商: 意法半導(dǎo)體
元件分類: Codec
英文描述: 18 BIT 8kHz TO 48kHz LOW POWER STEREO AUDIO DAC WITH INTEGRATED POWER AMPLIFIERS AND VOICE CODEC
中文描述: 18位8kHz至48kHz的低功耗立體聲音頻DAC,具有集成功率放大器和語音編解碼器
文件頁數(shù): 14/37頁
文件大?。?/td> 447K
代理商: STW5094
STw5094
14/37
Control Register CR12 Functions (Address: 0x0C)
*: state at power on initialization
X: reserved write 0
Control Register CR13 Functions (Address: 0x0D)
Control Register CR14 Functions (Address: 0x0E)
Control Register CR15 Functions (Address: 0x0F)
* state at power on initialization
7
6
5
4
3
2
1
0
Function
TONEG(3:0)
FSEL(1:0)
SN
DE
0
0
-
1
0
0
-
0
0
0
-
1
0
1
-
1
Tone gain is 0 dB
Tone gain is -3 dB
Tone gain in 3 dB step
Tone gain is -33 dB
*
0
0
1
1
0
1
0
1
f1 and f2 muted
f1 selected
f2 selected
f1 and f2 in summed mode
*
0
1
Squarewave signal selected
Sinewave signal selected
*
0
1
Tone
Ring Generator not connected to Transmit path
Tone
Ring Generator connected to Transmit path
*
7
6
5
4
3
2
1
0
Function
F1(7:0)
msb
lsb
Binary equivalent of the decimal number used to calculate f1
See Table 1
7
6
5
4
3
2
1
0
Function
F2(7:0)
msb
lsb
Binary equivalent of the decimal number used to calculate f2
See Table 1
7
6
5
4
3
2
1
0
Function
BE
BI
BZ(5:0)
0
1
Buzzer output disabled (set to 0)
Buzzer output enabled
*
0
1
Duty Cycle is intended as the relative width of logic 1
Duty cycle is intended as the relative width of logic 0
*
msb
lsb
Binary equivalent of the decimal number used to calculate the
duty cycle, using the formula:
DutyCycle = BZ(5:0) x 0.78125 %
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