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參數(shù)資料
| 型號(hào)： | STV9212 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Video Processor for CRT Monitors with PictureBooST |
| 中文描述： | 視頻處理器PictureBooST的CRT顯示器 |
| 文件頁數(shù)： | 23/34頁 |
| 文件大小： | 335K |
| 代理商： | STV9212 |
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STV9212
I2C-Bus Interface Specifications
Bits[5:4] = Test mode activation bits for device
testing in fabrication.
0: Normal operation mode (Default)
1: Test mode
Bits[3:0] = Internal band width limitation control.
Refer to electrical characteristics.
Sad0E
Read/Write
Reset Value: 1100 0001 (C1h)
Bit 7 = Video Insertion Pulse depth.
0: 0.2V
1: 0.4V (default)
Bits[6:1] = Infra-black level offset control
simultaneously on all three video
channels.
Bit 0 = Control range of infra-black level
adjustments via IBL1 IBL2 and IBL3
registers. Acts either on video signal
channels or CO1, CO2, CO3 outputs.
Refer to electrical characteristics.
0: Wide
1: Narrow (default)
Sad0F
Read/Write
Reset Value: 0000 1001 (09h)
Bit 7 = PictureBooST General Enable. (PBGEN)
0: Disable, function inhibited (Default)
1: Enable, function active
Bit 6 = PictureBooST Insertion Control. (PBINS)
0: PB pin insertion (Default)
1: Permanent insertion regardless of
signal on PB pin
Bit 5 = Reserved.
Bits[4:3] = PictureBooST Contrast Control
(PBCRST)
Bit 2 = Reserved.
Bits[1:0] = PictureBooST Brightness Control
(PBBRIG)
Sad10
Read/Write
Reset Value: 0010 1000 (28h)
Bit 7 = PictureBooST vivacity and brightness
enable.
0: Disable (default)
1: Enable
Bits[6:5] = PictureBooST Vivacity Amplitude
Control.
Bit 4 = Reserved.
Bits[3:1] = PictureBooST Vivacity Time Constant
Control.
Bit 0 = Reserved.
7
0
VIP
IBOF[5:0]
IBLR
G
7
0
PBGE
N
PBIN
S
PBCRST[1:0]
PBBRIG[1:0]
7
0
PBVIV
EN
PBVIVAM[1:0]
PBVIVTC[2:0]
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