參數(shù)資料
型號(hào): ST7597
廠商: 意法半導(dǎo)體
元件分類: Codec
英文描述: AC97 Audio Codec(AC97 音頻編解碼器)
中文描述: AC97音頻編解碼器(AC97音頻編解碼器)
文件頁數(shù): 15/20頁
文件大?。?/td> 208K
代理商: ST7597
3.3.10 - Powerdown Control/Status Register
(index 26h)
This read/write register is used to program power-
down states and monitor subsystem readiness.
The lower half of this register is read only status, a
"1" indicating that the subsection is "ready".
READY is defined as the subsection able to per-
form in its nominal state. When this register is
written the bit value that come in on AC-link will
have no effect on read only bits 0-7.
When the AC-link "Codec Ready" indicator bit
(SDATA_IN slot 0, bit 15) is a 1 indicates that the
AC-link and ST7597 control and status registers
are in a fully operational state. The ST7597 control-
ler must further probe this powerdown Con-
trol/Status register to determine exactly which
subsections, if any, are ready.
Bit
REF
ANL
DAC
ADC
Function
Vref’s up to nominal level
Analog mixer, etc ready
DAC section ready to accept data
ADC section ready to transmit data
The Power down modes are as follows. The first
three bits are to be used individually rather than in
combination with each other. The last bit PR3 can
be used in combination with PR2 or by itself. PR0
and PR1 control the PCM ADC’s and DAC’s only,
PR6 and PR7 are not used.
Bit
PR0
PR1
PR2
PR3
Function
PCM in ADC’s & input mux powerdown
PCM out DACs powerdown
Analog mixer powerdown (V
REF
still on)
Analog mixer powerdown (V
REF
off)
Digital interface (AC-link) powerdown
(external clk off)
Internal Clock disable
Not used
Not used
PR4
PR5
PR6
PR7
3.3.11 - Reserved Registers
(index 28h-58h)
These are reserved. Do not write to these registers.
3.3.12 - Vendor Reserved Registers
(index 5Ah - 7Ah)
These are reserved for future use.
Do not write to these registers.
3.3.13 - Vendor Specific Test Register
(index 7Ah)
This register is for Vendor Specific Test Mode.
Donot write to this register for normal use.
Osc
Function
1
0
0
0
0
Normal mode
(default)
1
x
x
x
1
DAC SDOUT =
ADC SDIN
1
1
0
0
x
Digital loop back
test
1
0
1
1
x
Analog loop back
test
0
x
x
x
x
Oscillator set in
powerdown mode (*)
Notes :
The default value is 8000h.
Once the oscillator is in power down through the MSB bit,
the AClink protocol can only be woken up by applying a
negative pulse on RESET pin.
3.3.14 - Vendor ID Registers
(index 7ch - 7Eh)
These registers, as shown below, contains the
SGS-THOMSON Microelectronics Identification
Code.
The ID method is Microsoft’s Plug and Play Vendor
ID code.
Reg
7Ch
7Eh
Default
5354h
4D02h
FUNCTIONAL DESCRIPTION
(continued)
ST7597
15/20
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