參數(shù)資料
型號(hào): ST72P621L4B1
英文描述: LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS. FLASH OR ROM MEMORY. LVD. WDG. 10-BIT ADC. 2 TIMERS. SCI. SPI
中文描述: 低速USB 8端點(diǎn)與3位微控制器。 FLASH或ROM存儲(chǔ)器。內(nèi)徑。水分散粒劑。 10位ADC。 2定時(shí)器。脊髓損傷。的SPI
文件頁數(shù): 75/133頁
文件大小: 1864K
代理商: ST72P621L4B1
ST7262
46/133
PWM AUTO-RELOAD TIMER (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register
is set and an overflow interrupt request is generat-
ed if the overflow interrupt enable bit, OIE, in the
ARTCSR register, is set. The OVF flag must be re-
set by the user software. This interrupt can be
used as a time base in the application.
External clock and event detector mode
Using the fEXT external prescaler input clock, the
auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register
is used to select the nEVENT number of events to
be counted before setting the OVF flag.
nEVENT = 256 - ARTARR
When entering HALT mode while fEXT is selected,
all the timer control registers are frozen but the
counter continues to increment. If the OIE bit is
set, the next overflow of the counter will generate
an interrupt which wakes up the MCU.
Figure 35. External Event Detector Example (3 counts)
COUNTER
t
FDh
FEh
FFh
FDh
OVF
ARTCSR READ
INTERRUPT
ARTARR=FDh
fEXT=fCOUNTER
FEh
FFh
FDh
IF OIE=1
INTERRUPT
IF OIE=1
ARTCSR READ
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