參數(shù)資料
型號(hào)： ST72E85A5G0
廠商： STMICROELECTRONICS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, UVPROM, 4.332 MHz, MICROCONTROLLER, CQFP80
封裝： WINDOWED, CERAMIC, QFP- 80
文件頁(yè)數(shù)： 53/117頁(yè)
文件大?。?/td> 748K
代理商： ST72E85A5G0
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)當(dāng)前第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)
40/117
ST7285C
16-BIT TIMER (Cont’d)
4.3.5 Output Compare
Two output compare registers are present: Output
Compare Register 1 and Output Compare Regis-
ter 2 (OCR1 and OCR2). These registers can be
used for several purposes, such as controlling an
output waveform or indicating when a period of
time has elapsed. The OCMP
i pin is associated
with the Output Compare
i function (i = 1 or 2).
The Output Compare Registers are unique in that
all bits are readable and writable and are not af-
fected by the timer hardware or by Reset. If a com-
pare function is not used, the two bytes of the cor-
responding Output Compare Registers can be
used as general purpose storage locations.
4.3.5.1 Output Compare Registers
The Output Compare Register
i (OCRi) is a 16-bit
register, which is made up of two 8-bit registers:
the most significant byte register (OCHR
i) and the
least significant byte register (OCLR
i).
In this section, the index,
i, may be 1 or 2.
The content of OCR
i is compared with the content
of the free running counter once during every timer
clock cycles, i.e. once every 8, 4 or 2 internal proc-
essor clock periods or 2 external clock periods ac-
cording to the clock control bits of the Timer Con-
trol Register (TCR2). If match is found, the Output
Compare Flag OCF
i of the TSR is set and the Out-
put Level bit (OLVL
i) of the TCR1 is clocked to the
OCMP
i pin (see output compare timing diagrams
Figure 6, Figure 7, Figure 8). OLVL
i is copied to
the corresponding output level latch and hence, to
the OCMP
i pin regardless of whether the Output
Compare Flag (OCF
i) is set or not. The value in
the OCR
i and the OLVLi bit should be changed af-
ter each successful comparison in order to control
an output waveform or establish a new elapsed
timeout.
An interrupt accompanies a successful output
compare if the corresponding interrupt enable bit
OCIE of the TCR1 is set, provided the I-bit of the
CCR is cleared. Otherwise, the interrupt remains
pending until both conditions are true. It is cleared
by a read of TSR followed by an access to the LSB
of the OCR
i.
After a processor write cycle to the OCHR
i regis-
ter, the output compare function is inhibited until
the OCLR
i is also written. Thus, the user must
write both bytes if the MSB is written first. A write
made to only the LSB will not inhibit the compare
function. The minimum time between two succes-
sive edges on the OCMP
i pin is a function of the
software program and the clock control bits of the
TCR2.
The OCMP
i output latch is forced low during reset
and stays low until valid compares change it to a
high level. Because the OCF
i flag and the OCRi
are undeterminate at power-on and are not affect-
ed by an external reset, care must be exercise
when initiating the output compare function with
software. The following procedure is recommend-
ed to prevent the OCF
i flag from being set be-
tween the time it is read and the write to OCR
i:
– Write to OCHR
i (further compares are inhibited).
– Read the TSR (first step of the clearance of OC-
F
i, which may be already set).
– Write to OCLR
i (enables the output compare
function and clears OCF
i).
相關(guān)PDF資料
PDF描述
ST72F321J9T7 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72F321J7T3 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72F321J7T1 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72F321J9T5 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
ST72F324BJ6B6 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP42
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST72F260G1B5 功能描述:8位微控制器 -MCU Flask 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F260G1M6 功能描述:8位微控制器 -MCU Flash 4K SPI/I2C/SCI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F260G1M6/TR 功能描述:8位微控制器 -MCU 8B MCU FLASH OR ROM MEMORY RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F262G1B5 功能描述:8位微控制器 -MCU Flask 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F262G1B6 功能描述:8位微控制器 -MCU 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*