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參數(shù)資料
| 型號(hào)： | ST7285C |
| 廠(chǎng)商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES |
| 中文描述： | 8位微控制器48,000鐵路發(fā)展策略光盤(pán)，3K內(nèi)存，ADC，兩個(gè)定時(shí)器，2個(gè)SPI，I2C和脊髓損傷接口 |
| 文件頁(yè)數(shù)： | 80/117頁(yè) |
| 文件大?。?/td> | 748K |
| 代理商： | ST7285C |
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ST7285C
ST7 ADDRESSING MODES
(Cont’d)
Inherent:
All related instructions are single byte ones. The
op-code fully specify all required information for
the CPU to process the operation. These instruc-
tions are single byte ones.:
Immediate:
The required data byte to do the operation is fol-
lowing the op-code. These are two byte instruc-
tions, one for the op-code and the other one for the
immediate data byte.
Direct (short, long):
The data byte required to carry out the operation is
found by its memory address, which follows the
op-code.
The direct addressing mode consists of two sub-
modes:
Direct (short):
The address is a byte, thus require only one byte
after the op-code, but only allow 00 - FF address-
ing space.
Direct (long):
The address is a word, thus allowing 64Kb ad-
dressing space, but requires 2 bytes after the op-
code.
Inherent Instruction
NOP
TRAP
Function
No operation
S/W Interrupt
Wait For Interrupt (Low Pow-
er Mode)
Halt Oscillator (Lowest Pow-
er Mode)
Sub-routine Return
Interrupt Sub-routine Return
Set Interrupt Mask
Reset Interrupt Mask
Set Carry Flag
Reset Carry Flag
Reset Stack Pointer
Load
Clear
Push/Pop to/from the stack
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Byte Multiplication
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC,
RRC
SWAP
Shift and Rotate Operations
Swap Nibbles
Immediate Instruction
LD
CP
BCP
AND, OR, XOR
ADC, ADD, SUB, SBC
Function
Load
Compare
Bit Compare
Logical Operations
Arithmetic Operations
Available Long and
Short Direct Instructions
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
stractions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
Short Direct
Instructions Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC,
RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Testand Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
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