參數(shù)資料
型號： ST40RA200XH6E
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372
封裝： 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-372
文件頁數(shù)： 37/94頁
文件大小： 2144K
代理商： ST40RA200XH6E
42/92
ST40RA
5 System configuration
5.9.6
PIO alternate functions
The function of pads with PIO alternate functions are controlled by the PIO.PC0, PIO.PC1 and
PIO.PC2 registers.
In the ST40RA device, the operational modes for these registers differ from the standard
architecture definition and are shown in Table 15.
[44:46]
EMPI_CS_ENB
Enable EMPI chip selection alternate function
000: NOTESC0 remapped to NOTEMPICS
001: NOTESC1 remapped to NOTEMPICS
010: NOTESC2 remapped to NOTEMPICS
011: NOTESC3 remapped to NOTEMPICS
100: NOTESC4 remapped to NOTEMPICS
101: NOTESC5 remapped to NOTEMPICS
110: Reserved
111: Disabled (value at reset)
RW
47
SEL_EXT_EMI_SLAVE
Select EMI slave or master functionality
0: EMI is bus master
1: EMI is bus slave
RW
[48:59]
Reserved
[60:63]
PIO_CONF
PIO_CONF
RW
Table 15: PIO alternate function registers
PIO bit configuration
PIO output state
PIO.PC2
PIO.PC1
PIO.PC0
NonPIO functiona
a. State following reset
-0
0
PIO bidirectional
Open drain
0
1
PIO output
Push-pull
0
1
0
PIO bidirectional
Open drain
0
1
PIO input
High impedance
1
0
PIO input
High impedance
1
0
1
Reserved
-
1
0
Reserved
-
1
SYSCONF.SYS_CON2
Functional pin use and behavior
0x0018
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