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參數(shù)資料
| 型號(hào)： | ST40RA150XH6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 150 MHz, RISC PROCESSOR, PBGA372 |
| 封裝： | 27 X 27 MM, BGA-372 |
| 文件頁數(shù)： | 84/90頁 |
| 文件大?。?/td> | 672K |
| 代理商： | ST40RA150XH6 |
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B Implementation restrictions
ST40RA166
85/88
B.7
Interconnect
B.7.1
Memory bridge functionality
Ensure there is no traffic passing though the memory bridge when changing frequency.
Semisynchronous modes of operation are not supported.
B.7.2
Clock selection
The alternate CLOCKGENB clock is not supported for the LMI.
B.7.3
Pad drive control
Programmable drive strength control is not supported for DDR operation.
B.8
GPDMA
B.8.1
Linked list support
Decrementing transfers are not supported as part of link list transfer sequences
B.8.2
2-D transfers
2-D transfers fail if the following conditions are met.
1
Source or destination length is greater than 64 bytes.
2
Real transfer unit is less then 32 bytes.
3
The expression length =
n * 64 + tu is true, where:
length is either SLENGTH or DLENGTH,
tu the real transfer unit of the first access of the second line,
n > 0.
B.8.3
Protocol signals
DACK
and DRACK protocol signals have limited support.
B.9
RTC clock
The feedback circuit for the LPCLK and LPOSC clock generation to the TC fails if the main core supply
is removed. In applications where this may occur, an LPCLK should be generated externally.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST40RA150XHA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-bit Embedded SuperH Device |
| ST40RA166 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-BIT EMBEDDED SUPERH MICROPROCESSOR |
| ST40RA166XH1 | 制造商:STMicroelectronics 功能描述: |
| ST40RA166XH6 | 制造商:STMicroelectronics 功能描述:32-BIT SUPERH CPU - Trays |
| ST40RA166XH6/TR | 制造商:STMicroelectronics 功能描述: |
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