參數(shù)資料
型號(hào)： SST89V58RD2-33-I-TQJE
廠商： Microchip Technology
文件頁(yè)數(shù)： 59/92頁(yè)
文件大?。?/td> 0K
描述： IC MCU 8BIT 40KB FLASH 44TQFP
標(biāo)準(zhǔn)包裝： 160
系列： FlashFlex®
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 36
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大小： 8K x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 托盤
2011 Silicon Storage Technology, Inc.
DS25087A
10/11
62
FlashFlex MCU
SST89V54RD2/RD / SST89V58RD2/RD
Not Recommended for New Designs
A Microchip Technology Company
Watchdog Timer
The Watchdog Timer mode is used to improve reliability in the system without increasing chip count
(See Figure 29). Watchdog Timers are useful for systems that are susceptible to noise, power glitches,
or electrostatic discharge. It can also be used to prevent a software deadlock. If during the execution of
the user’s code, there is a deadlock, the Watchdog Timer will time out and an internal reset will occur.
Only module 4 can be programmed as a Watchdog Timer (but still can be programmed to other modes
if the Watchdog Timer is not used).
To use the Watchdog Timer, the user pre-loads a 16-bit value in the compare register. Just like the
other compare modes, this 16-bit value is compared to the PCA timer value. If a match is allowed to
occur, an internal reset will be generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has three options:
1.
Periodically change the compare value so it will never match the PCA timer
2.
Periodically change the PCA timer value so it will never match the compare values
3.
Disable the watchdog timer by clearing the WDTE bit before a match occurs and then re-enable it
The first two options are more reliable because the Watchdog Timer is never disabled as in option #3.
If the program counter ever goes astray, a match will eventually occur and cause an internal reset. The
second option is also not recommended if other PCA modules are being used. Remember, the PCA
timer is the time base for all modules; changing the time base for other modules would not be a good
idea. Thus, in most application the first solution is the best option.
Use the code below to initialize the Watchdog Timer. Module 4 can be configured in either compare
mode, and the WDTE bit in CMOD must also be set. The user’s software then must periodically
change (CCAP4H, CCAP4L) to keep a match from occurring with the PCA timer (CH, CL). This code is
given in the Watchdog routine below.
;==============================================
Init_Watchdog:
MOV CCAPM4, #4CH; Module 4 in compare mode
MOV CCAP4L, #0FFH; Write to low byte first
MOV CCAP4H, #0FFH; Before PCA timer counts up
; to FFFF Hex, these compare
; values must be changed.
ORL
CMOD, #40H; Set the WDTE bit to enable the
; watchdog timer without
; changing the other bits in
; CMOD
;==============================================
;Main program goes here, but call WATCHDOG periodically.
;==============================================
WATCHDOG:
CLR
EA; Hold off interrupts
MOV CCAP4L, #00; Next compare value is within
MOV CCAP4H, CH; 65,535 counts of the
; current PCA
SETB EA; timer value
RET
;==============================================
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