參數(shù)資料
型號: SST55LC100M-45-C-BWE
元件分類: 存儲控制器/管理單元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA84
封裝: 9 X 9 MM, ROHS COMPLIANT, TFBGA-84
文件頁數(shù): 43/75頁
文件大?。?/td> 1040K
代理商: SST55LC100M-45-C-BWE
48
Advance Information
CompactFlash Card Controller
SST55LC100M
2006 Silicon Storage Technology, Inc.
S71316-00-000
3/06
Features 01H and 81H are used to enable and clear 8-bit data transfer mode. If the 01H feature
command is issued all data transfers will occur on the low order D7-D0 data bus and the IOCS16#
signal will not be asserted for data register accesses.
Feature 03H allows the host to select the transfer mode by specifying a value in the Sector Count
register. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value.
One PIO mode is selected at all times. The host may change the selected modes by the Set-Features
command.
Features 66H and CCH can be used to enable and disable whether the Power-on Reset (POR) Defaults
will be set when a software reset occurs.
TABLE9-11:Transfer Mode Values
Mode
Bits [7:3]
Bits [2:0]
PIO default mode
00000b
000b
PIO default mode, disable IORDY
00000b
001b
PIO flow control transfer mode
00001b
mode1
1. Mode = transfer mode number, all other values are not valid
Reserved
Other
N/A
T9-11.0 1316
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