參數資料
型號： SPAKDSP321VL275
廠商： Freescale Semiconductor
文件頁數： 5/84頁
文件大小： 0K
描述： IC DSP 24BIT 275MHZ 196-MAPBGA
標準包裝： 126
系列： DSP56K/Symphony
類型： 定點
接口： 主機接口，SSI，SCI
時鐘速率： 275MHz
非易失內存： ROM（576 B）
芯片上RAM： 576kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.60V
工作溫度： -40°C ~ 100°C
安裝類型： 表面貼裝
封裝/外殼： 196-LBGA
供應商設備封裝： 196-MAPBGA（15x15）
包裝： 托盤
Host Interface (HI08)
DSP56321 Technical Data, Rev. 11
Freescale Semiconductor
1-7
1.6 Host Interface (HI08)
The HI08 provides a fast, 8-bit, parallel data port that connects directly to the host bus. The HI08 supports a variety
of standard buses and connects directly to a number of industry-standard microcomputers, microprocessors, DSPs,
and DMA hardware.
1.6.1
Host Port Usage Considerations
Careful synchronization is required when the system reads multiple-bit registers that are written by another
asynchronous system. This is a common problem when two asynchronous systems are connected (as they are in the
Host port). The considerations for proper operation are discussed in Table 1-9.
1.6.2
Host Port Configuration
HI08 signal functions vary according to the programmed configuration of the interface as determined by the 16 bits
in the HI08 Port Control Register.
Table 1-9.
Host Port Usage Considerations
Action
Description
Asynchronous read of receive byte
registers
When reading the receive byte registers, Receive register High (RXH), Receive register Middle
(RXM), or Receive register Low (RXL), the host interface programmer should use interrupts or poll
the Receive register Data Full (RXDF) flag that indicates data is available. This assures that the data
in the receive byte registers is valid.
Asynchronous write to transmit byte
registers
The host interface programmer should not write to the transmit byte registers, Transmit register High
(TXH), Transmit register Middle (TXM), or Transmit register Low (TXL), unless the Transmit register
Data Empty (TXDE) bit is set indicating that the transmit byte registers are empty. This guarantees
that the transmit byte registers transfer valid data to the Host Receive (HRX) register.
Asynchronous write to host vector
The host interface programmer must change the Host Vector (HV) register only when the Host
Command bit (HC) is clear. This practice guarantees that the DSP interrupt control logic receives a
stable vector.
Table 1-10.
Host Interface
Signal Name
Type
State During
Reset1,2
Signal Description
H[0–7]
HAD[0–7]
PB[0–7]
Input/Output
Input or Output
Ignored Input
Host Data—When the HI08 is programmed to interface with a non-multiplexed
host bus and the HI function is selected, these signals are lines 0–7 of the
bidirectional Data bus.
Host Address—When the HI08 is programmed to interface with a multiplexed
host bus and the HI function is selected, these signals are lines 0–7 of the
bidirectional multiplexed Address/Data bus.
Port B 0–7—When the HI08 is configured as GPIO through the HI08 Port
Control Register, these signals are individually programmed as inputs or outputs
through the HI08 Data Direction Register.
相關PDF資料
PDF描述
VE-23M-EU CONVERTER MOD DC/DC 10V 200W
TAJC106M035HNJ CAP TANT 10UF 35V 20% 2312
1N4937 DIODE FAST 600V 1A DO-41
VI-21B-EU CONVERTER MOD DC/DC 95V 200W
DSP56301AG80 IC DSP 24BIT 80MHZ GP 208-LQFP
相關代理商/技術參數
參數描述
SPAKDSP56824BU70 制造商:Freescale Semiconductor 功能描述:
SPAKF56009FJ81 制造商:Motorola Inc 功能描述:
SPAKMC331CFC16 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:User’s Manual
SPAKMC331CFC20 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:User’s Manual
SPAKMC331CFV16 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:User’s Manual
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*