參數(shù)資料
型號(hào): SN74BCT8373NT
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 總線(xiàn)收發(fā)器
英文描述: BCT/FBT SERIES, 8-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, PDIP24
文件頁(yè)數(shù): 16/21頁(yè)
文件大?。?/td> 287K
代理商: SN74BCT8373NT
SN74BCT8373
SCAN TEST DEVICE
WITH OCTAL DTYPE LATCHES
SCBS471 JUNE 1990 REVISED JUNE 1994
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions
TERMINAL
NAME
DESCRIPTION
1D 8D
Normal-function data inputs. See function table for normal-mode logic. Internal pullups force these inputs to a high level if left
unconnected.
GND
Ground
LE
Normal-function latch-enable input. See function table for normal-mode logic. An internal pullup forces LE to a high level if
left unconnected.
OE
Normal-function output-enable input. See function table for normal-mode logic. An internal pullup forces OE to a high level
if left unconnected.
1Q 8Q
Normal-function data outputs. See function table for normal-mode logic.
TCK
Test clock. One of four terminals required by IEEE Standard 1149.1-1990. Test operations of the device are synchronous to
TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pullup forces
TCK to a high level if left unconnected.
TDI
Test data input. One of four terminals required by IEEE Standard 1149.1-1990. TDI is the serial input for shifting data through
the instruction register or selected data register. An internal pullup forces TDI to a high level if left unconnected.
TDO
Test data output. One of four terminals required by IEEE Standard 1149.1-1990. TDO is the serial output for shifting data
through the instruction register or selected data register. An internal pullup forces TDO to a high level when it is not active
and is not driven from an external source.
TMS
Test mode select. One of four terminals required by IEEE Standard 1149.1-1990. TMS directs the device through its TAP
controller states. An internal pullup forces TMS to a high level if left unconnected. TMS also provides the optional test reset
signal of IEEE Standard 1149.1-1990. This is implemented by recognizing a third logic level, double high (VIHH), at TMS.
VCC
Supply voltage
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