參數(shù)資料
型號： SM320C40TABS60/10
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 32-BIT, 60 MHz, OTHER DSP, UUC325
封裝： TAB-325
文件頁數(shù)： 2/64頁
文件大?。?/td> 1155K
代理商： SM320C40TABS60/10
SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H OCTOBER 1993 REVISED OCTOBER 2001
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
signal descriptions
This section gives signal descriptions for the SMJ320C40 device. The SMJ320C40 signal descriptions table
lists each signal, the number of pins, operating mode(s) (that is, input, output, or high-impedance state as
indicated by I, O, or Z, respectively), and function. All pins labeled NC are not to be connected by the user. A
line over a signal name (for example, RESET) indicates that the signal is active low (true at a logic-0 level). The
signals are grouped according to functions.
SMJ320C40 Signal Descriptions
SIGNAL
NAME
NO. OF
PINS
TYPE
DESCRIPTION
GLOBAL BUS EXTERNAL INTERFACE (80 PINS)
D31D0
32
I/O/Z
32-bit data port of the global bus external interface
DE
1
I
Data-bus-enable signal for the global bus external interface
A30A0
31
O/Z
31-bit address port of the global bus external interface
AE
1
I
Address-bus-enable signal for the global bus external interface
STAT3STAT0
4
O
Status signals for the global bus external interface
LOCK
1
O
Lock signal for the global bus external interface
STRB0
1
O/Z
Access strobe 0 for the global bus external interface
R/W0
1
O/Z
Read/write signal for STRB0 accesses
PAGE0
1
O/Z
Page signal for STRB0 accesses
RDY0
1
I
Ready signal for STRB0 accesses
CE0
1
I
Control enable for the STRB0, PAGE0, and R/W0 signals
STRB1
1
O/Z
Access strobe 1 for the global bus external interface
R/W1
1
O/Z
Read/write signal for STRB1 accesses
PAGE1
1
O/Z
Page signal for STRB1 accesses
RDY1
1
I
Ready signal for STRB1 accesses
CE1
1
I
Control enable for the STRB1, PAGE1, and R/W1 signals
LOCAL BUS EXTERNAL INTERFACE (80 PINS)
LD31LD0
32
I/O/Z
32-bit data port of the local bus external interface
LDE
1
I
Data-bus-enable signal for the local bus external interface
LA30LA0
31
O/Z
31-bit address port of the local bus external interface
LAE
1
I
Address-bus-enable signal for the local bus external interface
LSTAT3LSTAT0
4
O
Status signals for the local bus external interface
LLOCK
1
O
Lock signal for the local bus external interface
LSTRB0
1
O/Z
Access strobe 0 for the local bus external interface
LR/W0
1
O/Z
Read/write signal for LSTRB0 accesses
LPAGE0
1
O/Z
Page signal for LSTRB0 accesses
LRDY0
1
I
Ready signal for LSTRB0 accesses
LCE0
1
I
Control enable for the LSTRB0, LPAGE0, and LR/W0 signals
LSTRB1
1
O/Z
Access strobe 1 for the local bus external interface
LR/W1
1
O/Z
Read/write signal for LSTRB1 accesses
I = input, O = output, Z = high impedance
STRB0, STRB1 and associated signals (R/W1, R/W0, PAGE0, PAGE1, etc.) are effective over the address ranges defined by the
STRB ACTIVE bits.
§ HFH package has additional power and ground pins to reduce noise problems.
相關PDF資料
PDF描述
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SM320C6414DGADW60 64-BIT, 75 MHz, OTHER DSP, CPGA570
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