
SL811HS
Document #: 38-08008  Rev. *A
Page 4 of 29
1.0
 Conventions
1,2,3,4
Dh, 1Fh, 39h
0101b, 010101b
bRequest, n
Numbers without annotations are decimals.
Hexadecimal numbers are followed by an 
“
h.
”
Binary numbers are followed by a 
“
b.
”
Words in 
italics 
indicate terms defined by USB Specification or by this Specification.
2.0
 Definitions
USB
SL811HS 
U
niversal 
S
erial 
B
us
The SL811HS is a Cypress USB Host/Slave Controller, providing multiple functions on a single chip.
This part is offered in both a 28-pin PLCC package (SL811HS) and a 48-pin TQFP package
(SL811HST-AC). Throughout this document, 
“
SL811HS
”
 refers to both packages unless otherwise
noted.
Note:
 This chip does not include CPU.
The SL11 is a Cypress 
USB
 Peripheral Device Controller, providing multiple functions on a single chip.
This part is offered in both a 28-pin PLCC package (SL11) and a 48-pin TQFP package (SL11T-AC).
Throughout this document, 
“
SL11
”
 refers to both packages unless otherwise noted.
Note:
 This chip does not include a CPU.
The SL11H is a Cypress 
USB
 Host/Slave Controller, providing multiple functions on a single chip. This
part is offered in both a 28-Pin PLCC package (SL11H) and a 48-Pin TQFP package (SL11HT-AC).
Throughout this document, 
“
SL11H
”
 refers to both packages unless otherwise noted.
Note:
 This chip does not include CPU.
L
east 
S
ignificant 
B
it
M
ost 
S
ignificant 
B
it
R
ead/
W
rite
P
hase 
L
ock 
L
oop
R
andom 
A
ccess 
M
emory
S
erial 
I
nterface 
E
ngine
Handshake packet indicates a positive acknowledgment.
Handshake packet indicating a negative acknowledgment
U
niversal 
S
erial 
B
us 
D
river
S
tart 
o
f 
F
rame is the first transaction in each frame. It allows endpoints to identify the start of the frame
and synchronize internal endpoint clocks to the host.
C
yclic 
R
edundancy 
C
heck
The host computer system on which the USB Host Controller is installed
SL11
SL11H
LSB
MSB
R/W
PLL
RAM
SIE
ACK
NAK
USBD
SOF
CRC
HOST
3.0
 References
[Ref 1] USB Specification 1.1: 
http://www.usb.org.
4.0
 Introduction
4.1
The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB
peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of
buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.
The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed trans-
ceivers. The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode. 
The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support
to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Inter-
nally, the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.
The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages
operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
Block Diagram