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參數(shù)資料
| 型號： | SL811HST |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | Embedded USB Host/Slave Controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 13/29頁 |
| 文件大?。?/td> | 499K |
| 代理商： | SL811HST |
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SL811HS
Document #: 38-08008 Rev. *A
Page 13 of 29
5.3.2
The J-K force state control and USB Engine Reset bits can be used to generate USB reset condition on the USB. Forcing K-state
can be used for Peripheral device remote wake-up, Resume and other modes. These two bits are set to zero on power-up.
J-K Programming States [bits 3 and 4 of Control Register 05H]
5.3.3
The SL811HS is designed to communicate with either full or low-speed devices. At power-up bit 5 will be set LOW, i.e., for full
speed. There are two cases when communicating with a low-speed device. When a low-speed device is connected directly to
the SL811HS, bit 5 of Register 05H should be set to logic
“
1
”
and bit 6 of register 0FH, Output-Invert, needs to be set to
“
1
”
in
order to change the polarity of D+ and D
–
. When a low-speed device is connected via a HUB to SL811HS, bit 5 of Register 05H
should be set to logic
“
0
”
and bit 6 of register 0FH should be set to logic
“
0
”
in order to keep the polarity of D+ and D
–
for full
speed. In addition, make sure that bit 7 of USB-A/USB-B Host Control Registers [00H, 08H] is set to
“
1.
”
Low-speed/Full Speed Modes [bit 5 Control Register 05H]
5.3.4
When bit-6 (Suspend) is set to
“
1,
”
the power of the transmit transceiver will be turned off, the internal RAM will be in the suspend
mode, and the internal clocks will be disabled.
Note
.
Any activity on the USB bus (i.e., K-State, etc.) will resume normal operation.
To resume normal operation from the CPU side, a data Write cycle (i.e., A0 set HIGH for a data Write cycle) should be done.
Low-power Modes [bit 6 Control Register 05H]
5.3.5
The SL811HS provides an Interrupt Request Output, which can be activated on a number of conditions. The Interrupt Enable
Register allows the user to select conditions that will result in an Interrupt being issued to an external CPU. A separate Interrupt
Status Register is provided. It can be polled in order to determine those conditions that initiated the interrupt. (See Interrupt Status
Register description.) When a bit is set to
“
1
”
the corresponding interrupt is enabled.
Interrupt Enable Register, Address [06H]
Bits 0
–
1 are used for the USB A/B controller interrupt.
Bit 4 is used to enable/disable the SOF timer. To utilize this bit function, bit 0 of register 05H must be enabled and the SOF
counter registers 0EH and 0FH must be initialized.
Bit 5 is used to enable/disable the device inserted/removed interrupt.
When bit-6 of register 05H is set =
“
1,
”
bit 6 of this register enables the Resume Detect Interrupt. Otherwise, this bit is used
to enable Device detection status as defined in the Interrupt Status Register bit definitions.
Note:
2.
3.
Force K-State for low speed.
Force J-State for low speed.
Bit 4
Bit 3
Function
0
0
Normal operating mode
0
1
Force USB Reset, D+ and D
–
are set LOW (SE0)
Force J-State, D+ set HIGH, D
–
set LOW
[2]
Force K-State, D
–
set HIGH, D+ set LOW
[3]
1
0
1
1
Bit Position
Bit Name
Function
0
USB-A
USB-A Done Interrupt
1
USB-B
USB-B Done Interrupt
2
Reserved
3
Reserved
4
SOF Timer
1 = Enable Interrupt on 1-ms SOF Timer
5
Inserted/Removed
Slave Insert/Remove Detection
6
Device Detect/Resume
Enable Device Detect/Resume Interrupt
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SL811S | USB Dual Speed Slave Controller |
| SM-800 | ECL |
| SM-801 | ECL |
| SM-807 | ECL |
| SM-809 | ECL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL811HST-1.5 | 制造商:Cypress Semiconductor 功能描述:BUS Controller Circuit, 48 Pin, QFP |
| SL811HST-AC | 功能描述:IC USB HOST/SLAVE CTRLR 48LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| SL811HST-AXC | 功能描述:USB 接口集成電路 256B HOST COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| SL811HST-AXC | 制造商:Cypress Semiconductor 功能描述:IC USB HOST CONTROLLER 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ; No. of I/O's:8; Digital IC Case Style:TQFP; No. of Pins:48; RAM Memory Size:256KB; CPU Speed:48MHz; Peripherals:DMA; Embedded Interface Type:USB; Operating Temperature Min:0C; Operating Temperature |
| SL811S | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:USB Dual Speed Slave Controller |
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