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參數(shù)資料
| 型號(hào)： | SL811HST |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | Embedded USB Host/Slave Controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 14/29頁 |
| 文件大?。?/td> | 499K |
| 代理商： | SL811HST |
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SL811HS
Document #: 38-08008 Rev. *A
Page 14 of 29
5.3.6
This register is reserved for the device USB Address in Slave operation. It should not be written by the user.
USB Address Register, Reserved, Address [07H]
5.3.7
The ISR is a Read/Write register providing interrupt status. Interrupts can be cleared by writing to this register. To clear a specific
interrupt, the register is written with corresponding bit set to
“
1.
”
Interrupt Status Register, Address [0DH]
Bit 5 is provided to support USB cable Insertion/Removal for the SL811HS in Host Mode. This bit is set when a transition from
SE0 to IDLE (device inserted) or IDLE to SE0 (device removed) occurs on the bus.
Bit 6 is shared between Device Detection status and Resume detection interrupt. When bit-6 of register 05H is set to one, this
bit will be the Resume detection Interrupt bit. Otherwise, this bit is used to indicate the presence of a Device,
“
1
”
= device
“
Not
present
”
and
“
0
”
= device
“
Present.
”
In this mode this bit should be checked along with bit 5 to determine whether a device
has been inserted or removed.
Bit 7 provides continuous USB Data+ line status. Once it has been determined that a device has been inserted as described
above with bits 5 and 6, bit 7 can be used to detect if the inserted device is low- or full-speed.
5.3.8
This register has two modes: a Read from this register indicates the current SL811HS silicon revision.
Current Data Set Register/Hardware Revision/SOF Counter LOW, Address [0EH]
Writing to this register will set up auto generation of SOF to all connected peripherals. This counter is based on the 12-MHz
clock. To set up a 1-ms timer interval, the software must set up both SOF counter registers to the proper values.
Example
. To set up SOF for 1-ms interval, SOF counter register 0EH should be set to E0H.
Bit Position
Bit Name
Function
0
USB-A
USB-A Done Interrupt
1
USB-B
USB-B Done Interrupt
2
Reserved
3
Reserved
4
SOF timer
1 = Interrupt on 1-ms SOF Timer
5
Insert/Remove
Slave Insert/Remove Detection
6
Device Detect/Resume
Device Detect/Resume Interrupt
7
D+
Value of the Data+ Pin
Bit Position
Bit Name
Function
0
Reserved
Reserved for slave
1
Reserved
Reserved for slave
2
Reserved
Read will be zero
3
Reserved
Read will be zero
4
–
7
HW Revision
SL11H Read = 0H, SL811HS rev1.2 Read = 1H, SL811HS
rev1.5 Read = 2
Bit Position
Bit Name
Function
0
–
7
SOF LOW Counter Register
Write-only to set SOF LOW Counter Register, OEH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SL811S | USB Dual Speed Slave Controller |
| SM-800 | ECL |
| SM-801 | ECL |
| SM-807 | ECL |
| SM-809 | ECL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL811HST-1.5 | 制造商:Cypress Semiconductor 功能描述:BUS Controller Circuit, 48 Pin, QFP |
| SL811HST-AC | 功能描述:IC USB HOST/SLAVE CTRLR 48LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| SL811HST-AXC | 功能描述:USB 接口集成電路 256B HOST COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| SL811HST-AXC | 制造商:Cypress Semiconductor 功能描述:IC USB HOST CONTROLLER 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ; No. of I/O's:8; Digital IC Case Style:TQFP; No. of Pins:48; RAM Memory Size:256KB; CPU Speed:48MHz; Peripherals:DMA; Embedded Interface Type:USB; Operating Temperature Min:0C; Operating Temperature |
| SL811S | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:USB Dual Speed Slave Controller |
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