參數(shù)資料
型號: SED122ADXA
元件分類: 顯示控制器
英文描述: 16 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC165
封裝: DIE-165
文件頁數(shù): 46/50頁
文件大小: 398K
代理商: SED122ADXA
4–50
EPSON
SED1220
Option List
SED1220 provides the optional functions as described in
the following. Being adaptable to the customer’s optional
demand, contact the Business Department of our company
when installed.
Our product name corresponding to a customer’s
option is defined as shown below:
1. Specification of Character Generator ROM
(CGROM)
SED1220 integrates a character generator ROM
which can generate a maximum of 256 type characters.
The size of these characters is composed of 5
× 7 (8)
dots.
Being a mask ROM, the SED1220 CGROM is
adaptable to the character generator ROM exclusive
for the customer, too.
For our standard CGROMs, refer to the Character
Fonts Table.
2. Specification of Liquid Crystal Driver Voltage Bias
Value.
SED1220 integrates a liquid crystal diver voltage
generator circuit. Its 5-volt potential is divided into
resistance inside of IC to generate 1-V, 2-V, 3-V or
4-V potential as required for the liquid crystal driver.
Further, the 1-V, 2-V, 3-V or 4-Vpotential is converted
into impedance by a voltage follower to be supplied
to the liquid crystal driver circuit.
Either 1/5 or 1/4 bias value can be selected as
demanded by the customer.
Our standard bias value is preset to 1/5.
3. Specification of Reference Voltage of Liquid Crystal
Driver Voltage Regulation Circuit.
SED1220 integrates a voltage regulation circuit using
a booster voltage as its power supply to generate 5V
for the liquid crystal driver via the voltage regulation
circuit.
The voltage regulation circuit integrates a reference
voltage regulator VREG.
The customer can select a specification of using
either the internal reference voltage or external VSS
reference voltage.
Our standard specification is preset to the internal
reference voltage.
4. Power Supply to Booster Circuit
SED1220 integrates a booster circuit.
The customer can select a specification of using
either the regulator output VS1 or VSS as the supply
voltage to the booster circuit.
Our standard specification is preset to the regulator
output VS1.
5. External Clock Specifications
SED1220 integrates an external clock terminal and
there are two clock specifications, f and 4
×f
oscillation.
Either of them can be selected on your request.
The standard external clock specification is set to
fOSC.
6. Reset Signal Input Polarity Specifications
SED1220 inputs reset signal from the reset terminal
using edge detection and I/F specification 80/68
series can be selected according to this signal level.
RES input polarity can also be selected on your
request.
is set to the 68 series and
to the 80 series as
the standard RES input polarities.
7. Pad Layout Specifications of COMS1 Symbol
Terminal
On SED1220, pad layout of COMS1 symbol terminal
can be changed. COMS1 pad layout can be selected
on your request.
(Example)
SED1220D XB
Shipping form: A (AL
pad product) or B (metal
bump product)
Option corresponding
digit
Machine type: 0 (12 digits
× 3
lines) or 1 (12 digits
× 2 lines)
RES input
Type
polarity
Standard
Optional
68 series
80 series
68 series
Internal
External
oscillation
clock f osc. clock 4
×f osc.
Standard
q
×
Optional
q
×
q
Standard
Optional
Pad No
Pad Name
65
COMS1
COM1
66
COM1
COM2
67
COM2
COM3
68
COM3
COM4
69
COM4
COM5
70
COM5
COM6
71
COM6
COM7
72
COM7
COM8
73
COM8
COMS1
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